QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 997 10/12 BIT 250, 210 AND 170 MSPS ADC LTC2242-12/10, LTC2241-12/10 OR LTC2240-12/10 DESCRIPTION Demonstration circuit 997 supports a family of 10/12 The versions of the 997B demo board that support the BIT 250, 210 and 170 MSPS ADCs. Each assembly fea- LTC2242 family of 10 and 12 BIT A/D converters are tures one of the following devices: LTC2242-12, listed in Table 1. Depending on the required resolution LTC2241-12, LTC2240-12, LTC2242-10, LTC2241-10 or and sample rate the DC997 is supplied with the appro- LTC2240-10 high speed, high dynamic range ADCs. priate A/D. The circuitry on the analog inputs is opti- mized for analog input frequencies from 10 MHz to 250 MHz. Design files for this circuit board are available. Call the LTC factory. LTC is a trademark of Linear Technology Corporation Table 1. DC997B Variants DC997 VARIANTS ADC PART NUMBER RESOLUTION MAXIMUM SAMPLE INPUT FREQUENCY RATE 997B-A LTC2242-12 12-Bit 250Msps 10MHz < A < 250MHz IN 997B-B LTC2241-12 12-Bit 210Msps 10MHz < A < 250MHz IN 997B-C LTC2240-12 12-Bit 170Msps 10MHz < A < 250MHz IN 997B-D LTC2242-10 10-Bit 250Msps 10MHz < A < 250MHz IN 997B-E LTC2241-10 10-Bit 210Msps 10MHz < A < 250MHz IN 997B-F LTC2240-10 10-Bit 170Msps 10MHz < A < 250MHz IN 1 QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 997 10/12 BIT 250, 210 AND 170 MSPS ADC Table 2. Performance Summary (T = 25C) A PARAMETER CONDITION VALUE 3.3V 0.3V (10%) The 2.5V sup- Depending on sampling rate and the A/D converter provided, Supply Voltage ply required by the ADC is regulated this supply must provide up to 500mA. locally by U8 from the 3.3V Analog input range Depending on Sense Pin Voltage (at converter inputs) 1V to 2V PP PP Logic Input Voltages: OE, SHDN Minimum Logic High 1.7V Maximum Logic Low 0.7V Logic Output Voltage Minimum Logic High -3.4mA w/100W Termination 1.2V +170mV (FIN1108T LVDS Buffer) Maximum Logic Low +3.4mA w/100W Termination 1.2V 170mV Sampling Frequency (Convert Clock Frequency) See Table 1 Encode Clock Level 50 W Source Impedance. (Convert Clock input is capacitor cou- 0.2V 2.5V Sine Wave P-P P-P pled on board and terminated with 50W.) or Square wave Resolution See Table 1 Input frequency range See Table 1 SFDR See Applicable Data Sheet SNR See Applicable Data Sheet QUICK START PROCEDURE Demonstration circuit 997 is easy to set up to evaluate LTC2241-12, LTC2240-12, LTC2242-10, LTC2241-10 or the performance of any of the LTC2242 family of High LTC2240-10. Refer to Figure 1 for proper measure- Speed LVDS output A/D converters - LTC2242-12, ment equipment setup and follow the procedure below: 2