19-6295 Rev 6/12 DS1218 Nonvolatile Controller FEATURES PIN ASSIGNMENT Converts CMOS RAM into nonvolatile memories V V CCO 1 CCI 8 Unconditionally write protects when V is CC 2 7 V NC BAT out of tolerance Automatically switches to battery when 3 NC 6 CEO power fail occurs GND 4 5 CEI Space saving 8-pin PDIP or 8-pin 150 mil SO Packages Consumes less than 100nA of battery current PIN DESCRIPTION V - Input +5 Volt Supply CCI V - RAM Power (V ) Supply CCO CC CEI - Chip Enable Input NC - No Connection CEO - Chip Enable Output V - + Battery BAT GND - Ground DESCRIPTION The DS1218 is a CMOS circuit which solves the application problems of converting CMOS RAM into nonvolatile memory. Incoming power is monitored for an out-of-tolerance condition. When such a condition is detected, the chip enable output is inhibited to accomplish write protection and the battery is switched on to supply RAM with uninterrupted power. Special circuitry uses a low-leakage CMOS process which affords precise voltage detection at extremely low battery consumption. The 8-pin package keeps PC board real estate requirements to a minimum. By combining the DS1218 nonvolatile controller chip with a full CMOS memory and lithium batteries, 10 years of nonvolatile RAM operation can be achieved. OPERATION The DS1218 Nonvolatile Controller performs the circuit functions required to battery back-up a RAM. First, a switch is provided to direct power from the battery or V supply, depending on which is greater. CCI This switch has a voltage drop of less than 0.2V. The second function which the nonvolatile controller provides is power-fail detection. The DS1218 constantly monitors the V supply. When V falls to CC CCI 1.26 times the battery voltage, a precision comparator outputs a power-fail detect signal to the chip enable logic. The third function of write protection is accomplished by holding the chip enable output signal to within 0.2V of the V or battery supply, when a power-fail condition is detected. CCI During nominal supply conditions, the chip enable output will follow chip enable input with a maximum propagation delay of 10 ns. 1 of 7 DS1218 ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground -0.5V to +7.0V Operating Temperature Range 0C to +70C Storage Temperature Range -55C to +125C Soldering Temperature (reflow, SO) +260C Lead Temperature (soldering, 10s) +300C This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. PACKAGE THERMAL CHARACTERISTICS (Note 1) PDIP Junction-to-Ambient Thermal Resistance ( )........110C/W JA Junction-to-Case Thermal Resistance ( )40C/W JC SO Junction-to-Ambient Thermal Resistance ( )....136C/W JA Junction-to-Case Thermal Resistance ( )38C/W JC Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board for the SO. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. RECOMMENDED OPERATING CONDITIONS (0 C to +70 C) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Supply V 4.5 5.0 5.5 V 2 CCI Logic 1 V 2.0 5.5 V 2 IH Logic 0 V -0.3 0.8 V 2 IL Battery Supply V 2.5 3.0 3.5 V 2 BAT DC ELECTRICAL CHARACTERISTICS (0 C to +70 C V = 5V 10%) CCI PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Active Current I 2 5 mA 4 CCI Battery Current I 100 nA 4, 5 BAT RAM Current I 80 mA 6 CCO (V V -0.3V) CCO1 CCI RAM Current I 70 mA CCO (V V -0.2V) CCO CCI Input Leakage I -1.0 +1.0 A IL I -1.0 mA OH CEO Output 2.4V I 4.0 mA OL CEO Output 0.4V V Trip Point V 1.26xV CC CCTP BAT CAPACITANCE (T = +25C) A PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Input Capacitance C 5 pF IN Output Capacitance C 7 pF OUT 2 of 7