19-6307 Rev 6/12 DS1314 3V Nonvolatile Controller with Lithium Battery Monitor FEATURES PIN ASSIGNMENT Converts CMOS SRAM into nonvolatile memory V 1 8 V V 1 8 V CCO CCI CCO CCI V 2 7 BW V 2 7 BW BAT BAT Unconditionally write-protects SRAM when TOL 3 6 CEO TOL 3 6 CEO V is out of tolerance CC GND 4 5 CEI GND 4 5 CEI Automatically switches to battery backup supply when V power failure occurs DS1314 8-Pin DIP DS1314S-2 8-Pin SOIC CC (300 mils) (150 mils) Monitors voltage of a lithium cell and provides advanced warning of impending NC 1 16 NC NC 1 20 NC battery failure V 2 15 V V 2 19 V CCO CCI CCO CCI Signals low-battery condition on active low NC 3 14 RST NC 3 18 RST 17 V 4 13 NC V 4 NC Battery Warning output signal BAT BAT NC 5 12 BW NC 5 16 NC Automatic V power-fail detection for 3.0V CC TOL 6 11 CEO NC 6 15 BW or 3.3V power supplies NC 7 10 NC TOL 7 14 NC Space-saving 8-pin DIP and SOIC packages GND 8 9 CEI NC 8 13 CEO Optional 16-pin SOIC and 20-pin TSSOP NC 9 12 NC DS1314S 16-Pin SOIC versions reset processor when power failure GND 10 11 CEI (300 mils) occurs and hold processor in reset during DS1314E 20-Pin TSSOP system power-up PIN DESCRIPTION Industrial temperature range of -40C to V - Power Supply Input CCI +85C V - SRAM Power Supply Output CCO V - Backup Battery Input BAT CEI - Chip Enable Input CEO - Chip Enable Output TOL - V Tolerance Select CC BW - Battery Warning Output (Open Drain) RST - Reset Output (Open Drain) GND - Ground NC - No Connection DESCRIPTION The DS1314 Nonvolatile Controller with Battery Monitor is a CMOS circuit which solves the application problem of converting CMOS RAM into nonvolatile memory. Incoming power is monitored for an out- of-tolerance condition. When such a condition is detected, chip enable is inhibited to accomplish write protection and the battery is switched on to supply the RAM with uninterrupted power. Special circuitry uses a low-leakage CMOS process which affords precise voltage detection at extremely low battery consumption. 1 of 12 DS1314 In addition to battery-backup support, the DS1314 performs the important function of monitoring the remaining capacity of the lithium battery and providing a warning before the battery reaches end-of-life. Because the open-circuit voltage of a lithium backup battery remains relatively constant over the majority of its life, accurate battery monitoring requires loaded-battery voltage measurement. The DS1314 performs such measurement by periodically comparing the voltage of the battery as it supports an internal resistive load with a carefully selected reference voltage. If the battery voltage falls below the reference voltage under such conditions, the battery will soon reach end-of-life. As a result, the Battery Warning pin is activated to signal the need for battery replacement. MEMORY BACKUP The DS1314 performs all the circuit functions required to provide battery-backup for an SRAM. First, the device provides a switch to direct power from the battery or the system power supply (V ). Whenever CCI V is less than the switch point V and V is less than the battery voltage V , the battery is CCI SW CCI BAT switched in to provide backup power to the SRAM. This switch has voltage drop of less than 0.2 volts. Second, the DS1314 handles power failure detection and SRAM write protection. V is constantly CCI monitored, and when the supply goes out of tolerance, a precision comparator detects power failure and inhibits chip enable output ( CEO ) in order to write-protect the SRAM. This is accomplished by holding CEO to within 0.2 volts of V when V is out of tolerance. If CEI is (active) low at the time that CCO CCI power failure is detected, the CEO signal is kept low until CEI is brought high again. Once CEI is brought high, CEO is taken high and held high until after V has returned to its nominal voltage level. If CCI CEI is not brought high by 1.5 s after power failure is detected, CEO is forced high at that time. This specific scheme for delaying write protection for up to 1.5 s guarantees that any memory access in progress when power failure occurs will complete properly. Power failure detection occurs at 3.0V nominal (3.3V supply) when the TOL pin is wired to GND or at 2.7V nominal (3.0V supply) when TOL is connected to V . CCO BATTERY VOLTAGE MONITORING The DS1314 automatically performs periodic battery voltage monitoring at a factory-programmed time interval of 24 hours. Such monitoring begins within t after V rises above V , and is suspended REC CCI CCTP when power failure occurs. After each 24-hour period (t ) has elapsed, the DS1314 connects V to an internal 1.2 M test BTCN BAT resistor (R ) for one second (t ). During this one second, if V falls below the factory- INT BTPW BAT programmed battery voltage trip point (V ), the battery warning output BW is asserted. While BW is BTP active battery testing will be performed with period t to detect battery removal and replacement. BTCW Once asserted, BW remains active until the battery is physically removed and replaced by a fresh cell. The battery is still re-tested after each V power-up, however, even if BW was active on power-down. If CC the battery is found to be higher than V during such testing, BW is deasserted and regular 24-hour BTP testing resumes. BW has an open-drain output driver. Battery replacement following BW activation is normally done with V nominal so that SRAM data is CCI not lost. During battery replacement, the minimum time duration between old battery detachment and new battery attachment (t ) must be met or BW will not deactivate following attachment of the new BDBA 2 of 12