DS1832 3.3-Volt MicroMonitor Chip www.dalsemi.com FEATURES PIN ASSIGNMENT Halts and restarts an out-of-control VCC PBRST 1 8 microprocessor 2 TD 7 ST Holds microprocessor in check during power 3 6 TOL RST transients 4 5 RST Automatically restarts microprocessor after GND power failure DS1832 8-Pin DIP (300-mil) See Mech. Drawings Section Monitors pushbutton for external override Accurate 10% or 20% microprocessor power V PBRST 1 8 CC monitoring 2 7 TD ST Eliminates need for discrete components TOL 3 6 RST 20% tolerance for use with 3.0-volt systems Pin-compatible with the DS1232 4 5 RST GND Low cost 8-pin DIP, 8-pin SOIC, and space DS1832S 8-Pin SOIC (150-mil) See Mech. Drawings Section saving -SOP packages available Industrial temperature range of -40C to PBRST V 1 8 CC +85C TD 2 7 ST TOL 3 6 RST GND 4 5 RST DS1832 8-Pin -SOP (118-mil) See Mech. Drawings Section PIN DESCRIPTION PBRST - Pushbutton Reset Input TD - Time Delay Set TOL - Selects 10% or 20% V Detect CC GND - Ground RST - Active High Reset Output RST - Active Low Reset Output ST - Strobe Input V - Power Supply CC DESCRIPTION The DS1832 3.3-Volt MicroMonitor monitors three vital conditions for a microprocessor: power supply, software execution, and external override. First, a precision temperature-compensated reference and comparator circuit monitor the status of V . When an out-of-tolerance condition occurs, an internal CC power-fail signal is generated which forces the resets to an active state. When V returns to an CC in-tolerance condition, the reset signals are kept in the active state for a minimum of 250 ms to allow the power supply and processor to stabilize. 1 of 7 112099DS1832 The second function the DS1832 performs is pushbutton reset control. The DS1832 debounces the pushbutton input and guarantees an active reset pulse width of 250 ms minimum. The third function is a watchdog timer. The DS1832 has an internal timer that forces the reset signals to the active state if the strobe input is not driven low prior to timeout. The watchdog timer function can be set to operate on timeout settings of approximately 150 ms, 600 ms, or 1.2 seconds. OPERATION - POWER MONITOR The DS1832 detects out-of-tolerance power supply conditions and warns a processor-based system of impending power failure. When V falls below a preset level as defined by TOL, the V comparator CC CC outputs the signals RST and RST . When TOL is connected to ground, the RST and RST signals become active as V falls below 2.98 volts. When TOL is connected to V , the RST and RST signals become CC CC active as V falls below 2.64 volts. The RST and RST are excellent control signals for a microprocessor, CC as processing is stopped at the last possible moments of valid V . On power-up, RST and RST are kept CC active for a minimum of 250 ms to allow the power supply and processor to stabilize. OPERATION - PUSHBUTTON RESET The DS1832 provides an input pin for direct connection to a pushbutton reset (see Figure 2). The pushbutton reset input requires an active low signal. Internally, this input is debounced and timed such that RST and RST signals of at least 250 ms minimum are generated. The 250 ms delay commences as the pushbutton reset input is released from the low level. OPERATION - WATCHDOG TIMER The watchdog timer function forces RST and RST signals active when the ST input is not clocked within the predetermined time period. The timeout period is determined by the condition of the TD pin. If TD is connected to ground the minimum watchdog timeout would be 62.5 ms, TD floating would yield a minimum timeout of 250 ms, and TD connected to V would provide a timeout of 500 ms minimum. CC Timeout of the watchdog starts when RST and RST become inactive. If a high-to-low transition occurs on the ST input pin prior to timeout, the watchdog timer is reset and begins to timeout again. If the watchdog timer is allowed to timeout, then the RST and RST signals are driven active for a minimum of 250 ms. The ST input can be derived from many microprocessor outputs. The most typical signals used are the microprocessor address signals, data signals or control signals. When the microprocessor functions normally, these signals would, as a matter of routine, cause the watchdog to be reset prior to timeout. To guarantee that the watchdog timer does not timeout, a high-to-low transition must occur at or less than the minimum times shown in Table 1. A typical circuit example is shown in Figure 4. The DS1832 watchdog function cannot be disabled. The watchdog strobe input must be strobed to avoid a watchdog timeout and reset. 2 of 7