DS1842 19-4557 Rev 1 3/11 76V, APD, Bias Output Stage with Current Monitoring General Description Features The DS1842 integrates the discrete high-voltage com- 76V Maximum Boost Voltage ponents necessary for avalanche photodiode (APD) Switch FET bias and monitor applications. A switch FET is used in conjunction with an external DC-DC controller to create Current Monitor with a Wide 1A to 2mA Range, a boost DC-DC converter. A current clamp limits cur- Fast 50ns Time Constant, and 10:1 and 5:1 Ratio rent through the APD and also features an external 2mA Current Clamp with External Shutdown shutdown. The device also includes a dual current mir- ror to monitor the APD current. Multiple External Filtering Options 3mm x 3mm, 14-Pin TDFN Package with Exposed Pad Applications APD Biasing Ordering Information GPON Optical Network Unit and Optical Line Transmission PART TEMP RANGE PIN-PACKAGE DS1842N+ -40C to +85C 14 TDFN-EP* DS1842N+T&R -40C to +85C 14 TDFN-EP* +Denotes a lead(Pb)-free/RoHS-compliant package. Pin Configuration appears at end of data sheet. T&R = Tape and reel. *EP = Exposed pad. Typical Application Circuit 3.3V LX C BULK DS1842 GATE MIRIN SW GND CURRENT MIRROR MIR1 FB C COMP R COMP COMP CLAMP CURRENT D2 LIMIT MIR2 EXTERNAL MONITOR MIROUT ROSA DS1875 APD TIA MON3 Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com.76V, APD, Bias Output Stage with Current Monitoring ABSOLUTE MAXIMUM RATINGS Voltage Range on GATE and CLAMP Continuous Power Dissipation (T = +70C) A Relative to GND...................................................-0.3V to +12V TDFN (derate 24.4mW/C above +70C).................1951.2mW Voltage Range on MIRIN, MIROUT, Operating Junction Temperature Range...........-40C to +150C MIR1, and MIR2 Relative to GND........................-0.3V to +80V Storage Temperature Range .............................-55C to +135C Voltage Range on LX Relative to GND...................-0.3V to +85V Lead Temperature (soldering, 10s) .................................+300C Soldering Temperature (reflow) .......................................+260C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PACKAGE THERMAL CHARACTERISTICS (Note 1) TDFN Junction-to-Ambient Thermal Resistance ( ) ............41C/W JA Junction-to-Case Thermal Resistance ( ) ...................8C/W JC Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. ELECTRICAL CHARACTERISTICS (T = -40C to +85C, unless otherwise noted.) A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Switching Frequency f 0 1.2 MHz SW C V = 0V, V= 25V 40 GATE GS DS FET Capacitance pF C f= 1MHz 90 LX SW FET Gate Resistance R 22 G V = 3V, I = 170mA 4.6 10 GS D FET On-Resistance R DSON V = 10V, I = 170mA 3.7 8 GS D GATE Voltage V 0 11 V GS Switching Current I Duty cycle = 10%, f = 100kHz 680 mA LX SW LX Voltage V 80 V LX LX Leakage I V = 0V, V = 76V -1 +1 A IL(LX) GATE LX CLAMP Voltage V 0 11 V CLAMP CLAMP Threshold V 2 4 7 V CLT CLAMP = low 1.75 2.6 4 mA Maximum MIROUT Current I MIROUT CLAMP = high 10 A I = 1mA 0.095 0.100 0.105 MIROUT MIR1 to MIROUT Ratio K A/A MIR1 I = 1A 0.094 0.100 0.106 MIROUT 15V < V < 76V MIRIN I = 1mA 0.190 0.200 0.210 MIROUT MIR2 to MIROUT Ratio K A/A I = 1A 0.188 0.200 0.212 MIR2 MIROUT 15V < V < 76V MIRIN MIR1, MIR2 Rise Time (20%/80%) t (Note 2) 30 ns RC Shutdown Temperature T (Note 3) +150 C SHDN Leakage on GATE and CLAMP I -1 +1 A IL Note 2: Rising MIROUT transition from 10A to 1mA V = 40V, 2.5k load. MIRIN Note 3: Guaranteed by design not production tested. 2 DS1842