DS1855 Dual Nonvolatile Digital Potentiometer and Secure Memory FEATURES PIN CONFIGURATIONS Two Linear Taper Potentiometers SDA 1 14 Vcc DS1855-010 (One 10k, 100 Position SCL 2 H0 13 and One 10k, 256 Position) A0 3 12 W1 DS1855-020 (One 10k, 100 Position A1 4 11 H1 and One 20k, 256 Position) A2 5 L1 10 DS1855-050 (One 10k, 100 Position WP 6 9 W0 and One 50k, 256 Position) GND L0 7 8 DS1855-100 (One 10k, 100 Position and One 100k, 256 Position) TSSOP (173 mils) 256 Bytes of EEPROM Memory Access to Data and Potentiometer Control via a 2-Wire Interface Top View External Write-Protect Pin to Protect Data and Potentiometer Settings A Data and Potentiometer Settings Also Can Be Write Protected Through Software B Control Nonvolatile Wiper Storage C Operates from 3V or 5V Supplies 14-Pin TSSOP, 16-Ball CSBGA, and D 14-Pin Flip-Chip Packages 1 2 3 4 Industrial Operating Temperature: -40C to +85C CSBGA (4mm x 4mm) Flip Chip (100 mils x 100 mils) (Not Shown) DESCRIPTION The DS1855 dual nonvolatile (NV) digital potentiometer and secure memory consists of one 100-position linear taper potentiometer, one 256-position linear taper potentiometer, 256 bytes of EEPROM memory, and a 2-wire interface. The DS1855, which features a new software write protect, is an upgrade of the DS1845. The DS1855 provides an ideal method for setting bias voltages and currents in control applications using a minimum of circuitry. The EEPROM memory allows a user to store configuration or calibration data for a specific system or device as well as provide control of the potentiometerer wip settings. Any type of user information may reside in the first 248 bytes of this memory. The next two addresses of EEPROM memory are for potentiometer settings and the remaining 6 bytes of memory are reserved. These reserved and potentiometer registerss hould not be used for data storage. Access to this EEPROM is via an industry-standard 2-wire bus. The interface I/O pins consist of SDA and SCL. The wiper position of the DS1855, as well as EEPROM data, can be writ eprotected through hardware using the write-protect input pin (WP) or software using the 2-wire interface. 1 of 21 19-6586 Rev 2 1/13 DS1855 PIN DESCRIPTIONS Name TSSOP BGA Description V 14 A3 Power Supply Terminal. The DS1855 will support supply CC voltages ranging from +2.7V to +5.5V. GND 7 D1 Ground Terminal. SDA 1 B2 2-Wire serial data interface. The serial data pin is for serial data transfer to and from the DS1855. The pin is open drain and may be wire-ORed with other open drain or open collector interfaces. SCL 2 A2 2-Wire Serial Clock Input. The serial clock input is used to clock data into the DS1855 on rising edges and clock data out on falling edges. WP 6 C1 Write Protect Input. If set to logic 0, the data in memory and the potentiometer wiper setting may be changed. If set to logic 1, both the memory and the potentiometer wiper settings will be write protected. The WP pin is pulled high internally. A0 3 A1 Address Input. Pins A0, A1, and A2 are used to specify the address of each DS1855 when used in a multi-dropped configuration. Up to eight DS1855s may be addressed on a single 2-wire bus. A1 4 B1 Address Input. A2 5 C2 Address Input. H0 13 A4 High terminal of Potentiometer 0. For both potentiometers, it is not required that the high terminal be connected to a potential greater than the low terminal. Voltage applied to the high terminal of each potentiometer cannot exceed V or go below ground. CC H1 11 B3 High terminal of Potentiometer 1. L0 8 D3 Low terminal of Potentiometer 0. For both potentiometers, it is not required that the low terminal be connected to a potential less than the high terminal. Voltage applied to the low terminal of each potentiometer cannot exceed V or go below ground. CC L1 10 C4 Low terminal of Potentiometer 1. W0 9 D4 Wiper terminal of Pot 0. The wiper position of Potentiometer 0 is determined by the byte at EEPROM memory location F9h. Voltage applied to the wiper terminal of each potentiometer cannot exceed the power supply voltage, V , or go below ground. CC W1 12 B4 Wiper terminal of Pot 1. The wiper position of Potentiometer 1 is determined by the byte at EEPROM memory location F8h. NC C3 No Connect. NC D2 No Connect. 2 of 21