DS21455/DS21458 Quad T1/E1/J1 Transceivers www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS21455 and DS21458 are quad monolithic Four Independent Transceivers, Each Having the devices featuring independent transceivers that can Following Features: be software configured for T1, E1, or J1 operation. Complete T1 (DS1)/ISDN-PRI/J1 Transceiver Each is composed of a line interface unit (LIU), Functionality framer, HDLC controllers, and a TDM backplane Complete E1 (CEPT) PCM-30/ISDN-PRI interface, and is controlled via an 8-bit parallel port Transceiver Functionality configured for Intel or Motorola bus operations. The Short- and Long-Haul Line Interface for DS21455* is a direct replacement for the older Clock/Data Recovery and Waveshaping DS21Q55 quad MCM device. The DS21458, in a CMI Coder/Decoder smaller package (17mm CSBGA) and featuring an Crystal-Less Jitter Attenuator improved controller interface, is software compatible with the older DS21Q55. Fully Independent Transmit and Receive Functionality *The JTAG function on the DS21455/DS21458 is a single controller for all four transceivers, unlike the DS21Q55, which has Dual HDLC Controllers a JTAG controller-per-transceiver architecture. On-Chip Programmable BERT Generator and APPLICATIONS Detector Routers Internal Software-Selectable Receive- and Channel Service Units (CSUs) Transmit-Side Termination Resistors for Data Service Units (DSUs) 75 /100 /120 T1 and E1 Interfaces Muxes Dual Two-Frame Elastic-Store Slip Buffers that Switches can Connect to Asynchronous Backplanes Up to Channel Banks 16.384MHz T1/E1 Test Equipment 16.384MHz, 8.192MHz, 4.096MHz, or 2.048MHz Clock Output Synthesized to ORDERING INFORMATION Recovered Network Clock PART TEMP RANGE PIN-PACKAGE Programmable Output Clocks for Fractional T1, 256 BGA DS21455 0C to +70C E1, H0, and H12 Applications (27mm x 27mm) Interleaving PCM Bus Operation 256 BGA DS21455+ 0C to +70C (27mm x 27mm) 8-Bit Parallel Control Port, Multiplexed or 256 BGA Nonmultiplexed, Intel or Motorola DS21455N -40C to +85C (27mm x 27mm) IEEE 1149.1 JTAG-Boundary Scan 256 BGA DS21455N+ -40C to +85C (27mm x 27mm) 3.3V Supply with 5V Tolerant Inputs and 256 CSBGA Outputs DS21458 0C to +70C (17mm x 17mm) DS21455 Directly Replaces DS21Q55 256 CSBGA DS21458+ 0C to +70C (17mm x 17mm) Signaling System 7 (SS7) Support 256 CSBGA DS21458N -40C to +85C RAI-CI, AIS-CI Support (17mm x 17mm) 256 CSBGA DS21458N+ -40C to +85C (17mm x 17mm) + Denotes a lead(Pb)-free/RoHS-compliant package. Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata. 1 of 269 REV: 051507 DS21455/DS21458 Quad T1/E1/J1 Transceivers DOCUMENT REVISION HISTORY REVISION CHANGES 040804 New Product Release. 1. An incorrect Device ID was shown in the IDR register. A table was added to clearly show the Device IDs for the DS21455 and DS21458. 2. Corrected multiple incorrect pin names in Figure 5-2. The pin names were changed to match the correct pin names shown in Table 5-2. Pin A1 was changed from TNEG0 to TNEGO3. Pin F11 was changed from TLINK3 to TLINK2. Pin K1 was changed from RTIP to RTIP1. 091304 Pin K9 was changed from UNUSED to N.C. Pin K15 was changed from JSTRST to TSTRST. Pin P3 was changed from UNUSED to N.C. 3. The 8X clock reference was removed from Figure 3-1 and Figure 3-2. 4. The thermal data shown in Section 37 was corrected and the LQFP package information was removed. 5. The supply current shown in Section 37 was corrected and a typical power dissipation number was added, as well as a note explaining the testing conditions. Removed CCR4.0, CCR4.1, CCR4.2, and CCR4.3 bits from CCR4. These were 101304 listed as User Programmable Outputs but these do not exist on the DS21458 or the DS21455. Removed references to TESO and TDATA in the pin description list, as these pins 042105 are not available on the DS21455/DS21458. Added the MCLKS bit to CCR1.7 (was missing in previous data sheet revisions) in 081805 Section 12. 042106 Replaced Figure 25-5 and Figure 25-6, added Table 25-6 and Table 25-7. 052406 Added lead-free part numbers to Ordering Information table (page 1). Removed description for RCL pin (device does not have this pin) (page 23) 051507 corrected register setting for Transmit Signaling Registers E1 CCS mode (page 102). 2 of 269