DS2502P-E64+ Analog Devices

19-5072 12/09 DS2502-E64 IEEE EUI-64 Node Address Chip www.maxim-ic.com FEATURES PIN ASSIGNMENT IEEE-approved factory programmed 64-bit TSOC PACKAGE TO-92 node address chip (EUI-64) with 768 bits DS2502-E64 user-programmable OTP-EPROM YYWWRR communicates with the economy of one CCCCCC signal plus ground E 6 4 Meets the node identification requirements of 2 5 0 2 YYWW IEEE Standard 1394-1995 (FireWire ) Unique, factory-lasered and tested 64-bit registration number assures absolute traceability because no two parts are alike TOP VIEW THE DOT MARKS PIN 1 Built-in multidrop controller ensures compatibility with other 1-Wire products Device is an add only memory where YYWW = DATE CODE RR = DIE REVISION CODE additional data can be programmed into CCCCCC = COUNTRY CODE EPROM without disturbing existing data Reduces control, address, data, power and programming signals to a single pin 1 2 3 Directly connects to a single port pin of a SIDE VIEW microprocessor and communicates at up to BOTTOM VIEW 16.3k bits per second Presence detector acknowledges when reader first applies voltage Low cost TO-92 or TSOC surface mount ORDERING INFORMATION packages PART TEMP PIN- RANGE PACKAGE Reads over a wide voltage range of 2.8V to DS2502-E64+ -40C to +85C 3 TO-92 6.0V from -40C to +85C programs at DS2502P-E64+ -40C to +85C 6 TSOC 11.5V to 12.0V from -40C to +50C + Denotes a lead(Pb)-free/RoHS-compliant package. 3 2 1 TM FireWire is a trademark of Apple Computer, Inc. DESCRIPTION The DS2502-E64 is a variant of the DS2502 1024-bit Add-Only Memory. It differs from the standard DS2502 in its custom ROM family code 89h, and the UniqueWare Identifier 5E7h in place of the upper 12 bits of the standard ROM serialization field. Otherwise, the electrical and logical behavior is identical to that of the DS2502. For technical details please refer to the DS2502 data sheet. 1 of 4 GND DATA NC NC NC NC DATA NC GNDDS2502-E64 The first 32 bytes of the DS2502-E64s EPROM memory contain a globally unique 64-bit node address (EUI-64) and are write-protected. The data structure follows the conventions of UniqueWare devices using Default Data Structure (Figure 1). This format is also known as UDP (universal data packet) and is commonly used in 1-Wire APIs. Therefore, if using one of those APIs one can call a high level function to read and verify the inverted CRC16. The UDP is defined in Application Note 114, 1-Wire File Structure, and the APIs can be found in the 1-Wire Software Development Kits. Figure 1. EUI-64 NODE ADDRESS CHIP DATA STRUCTURE CRC16 COMPANY ID VALUE EXTENSION ID VALUE PROJECT ID (UNUSED) LENGTH MSB LSB MSB LSB MSB LSB MSB LSB 17 BYTES 3 BYTES CONSTANT 4 BYTES CONSTANT 1 BYTE 2 BYTES 5 BYTES SERIALIZATION FFh 006035h 00001128h 0Ch HIGH ADDRESS LOW ADDRESS The data record starts with a length byte (0Ch) and the 4-byte UniqueWare Project ID 00001128h. The next eight bytes contain the EUI-64 global identifier (node address) which consists of an incrementing 40-bit extension identifier and the IEEE-assigned 24-bit company ID value 006035h. An inverted 16-bit CRC ends the data record. The remaining bytes of the 32-byte memory page remain unprogrammed. Neither the 40bit extension identifier nor the 24-bit company ID are related to the 64-bit ROM registration number. The ROM registration number is used to provide a unique address to access the DS2502-E64 when multidropped on a 1-Wire bus. EXAMPLE Assume that a manufacturers company ID value is 006035h and the 40-bit extension identifier is 234567ABCDh. The EUI-64 value generated from these two numbers is 006035234567ABCDh, whose byte and bit representations are illustrated in Figure 2. Figure 2. SAMPLE EUI-64 VALUE MOST SIGNIFICANTBYTE LEAST SIGNIFICANTBYTE 00 60 35 23 45 67 AB CD HEX 0000 0000 0110 0000 0011 0101 0010 0011 0100 0101 0110 0111 1010 1011 1100 1101 BINARY MOST SIGNIFICANT BIT LEAST SIGNIFICANT BIT This information is stored in the DS2502-E64 as 64-bit number with the least significant byte at the lower address. Including the length byte and the inverted CRC, the complete set of data is shown in Figure 3. Figure 3. PHYSICAL ADDRESS AND DATA MAPPING INSIDE THE DEVICE ADDRESS 0E 0D 0C 0B 0A 09 08 07 06 05 04 03 02 01 00 DATA 3E FF 00 60 35 23 45 67 AB CD 00 00 11 28 0C 2 of 4