ABRIDGED DATA SHEET EVALUATION KIT AVAILABLE 2 DS28C22 DeepCover Secure Memory with I C SHA-256 and 3Kb User EEPROM General Description Benefits and Features M DeepCover embedded security solutions cloak sensi- Symmetric Key-Based Bidirectional Secure tive data under multiple layers of advanced physical Authentication and Encryption Model Based security to provide the most secure key storage possible. on SHA-256 The DeepCover Secure Memory (DS28C22) combines Dedi cated Hardware-Accelerated SHA Engine for crypto-strong, bidirectional, secure challenge-and- Generating SHA-256 MACs response authentication and small message encryption Strong Authentication with a 256-Bit, User- functionality with an implementation based on the FIPS Programmable Secret, and Input Challenge 180-specified Secure Hash Algorithm (SHA-256). A 3Kb user-programmable EEPROM array provides nonvola- 3072 Bits of User EEPROM Partitioned Into 12 Pages of 256 Bits tile storage for application data and additional protected memory holds a read-protected secret for SHA-256 oper- User-Programmable and Irreversible EEPROM ations and settings for user memory control. Each device Protection Modes Including Authentication, Write has its own guaranteed unique and unalterable 64-bit and Read Protect, Encryption, and OTP/EPROM ROM identification number (ROM ID) that is factory pro- Emulation grammed into the chip. This unique ROM ID is used as a 2 Supports 100kHz and 400kHz I C Communication fundamental input parameter for cryptographic operations Speeds and also serves as an electronic serial number within the Supports Power-Saving Sleep Mode at 0.5A (typ) application. A bidirectional security model enables two- way authentication and encryption between a host system Operating Range: 3.3V 10%, -40C to +85C and slave-embedded DS28C22. Slave-to-host authenti- 8-Pin TDFN Package cation is used by a host system to securely validate that an attached or embedded DS28C22 is authentic. Host- Ordering Information appears at end of data sheet. to-slave authentication is used to protect DS28C22 user memory from being modified by a nonauthentic host. The For related parts and recommended products to use with this part, refer SHA-256 message authentication code (MAC), which the to www.maximintegrated.com/DS28C22.related. DS28C22 generates, is computed from data in the user memory, an on-chip secret, a host random challenge, and Typical Application Circuit the 64-bit ROM ID. The device also facilitates encrypted read and write between host and slave using a one time pad computed by the SHA-256 engine. When not in use, 3.3V the DS28C22 can be put in sleep mode where power consumption is minimal. R P VCC SDA Applications 2 (I C PORT) SCL Authentication of Network-A ttached Appliances DS28C22 System Intellectual Property Protection C Secure Feature Setting for Configurable Systems SLPZ Key Generation and Secure Exchange for Crypto- graphic Systems R = 1.1k P 2 MAXIMUM I C BUS CAPACITANCE 320pF DeepCover is a registered trademark of Maxim Integrated Products, Inc. 219-0029 Rev 2 7/13ABRIDGED DATA SHEET 2 DS28C22 DeepCover Secure Memory with I C SHA-256 and 3Kb User EEPROM Absolute Maximum Ratings Voltage Range on Any Pin Relative to GND ........ -0.5V to +4.0V Storage Temperature Range ............................ -55C to +125C Maximum Curren t into Any Pin...........................................20mA Lead Temperature (soldering, 10s) ................................. +300C Operating Temperature Range .......................... -40C to +85C Soldering Temperature (reflow) ...................................... +260C Junction Temperature ...................................................... +150C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. (Note 1) Package Thermal Characteristics TDFN Junction-to-Ambient Thermal Resistance ( ) .......... 60C/W JA Junction-to-Case Thermal Resistance ( ) ............... 11C/W JC Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. Electrical Characteristics (T = -40C to +85C, unless otherwise noted.) (Note 2) A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Voltage V 2.97 3.3 3.63 V CC (Note 3) 750 Supply Current I A CC Sleep mode (SLPZ pin low), V = 3.63V 0.5 2.0 CC SHA-256 Engine Computation Current I mA CSHA Refer to the full data sheet. Computation Time t ms CSHA EEPROM Programming Current I (Notes 4, 5) 2 mA PROG Programming Time for 32-Bit t Refer to the full data sheet. ms PROG Segment Write/Erase Cycling Endurance N T = +85C (Notes 6, 7) 1000 CY A Data Retention t T = +85C (Notes 8, 9, 10) 10 years DR A SLPZ Pin LOW Level Input Voltage V -0.5 0.3 x V V IL CC 0.7 x V + CC HIGH Level Input Voltage V V IH V 0.5V CC Input Leakage Current I Pin at 3.63V 0.1 A I Wakeup Time from Sleep Mode t (Note 11) 250 s SWUP 2 I C SCL and SDA Pins (Note 12) LOW Level Input Voltage V -0.5 0.3 x V V IL CC 0.7 x V CC(MAX) HIGH Level Input Voltage V V IH V + 0.5V CC Maxim Integrated 2 www.maximintegrated.com