Request DS28E16 Security User Guide EVALUATION KIT AVAILABLE Click here for production status of specific part numbers. DS28E16 1-Wire Secure SHA-3 Authenticator General Description Benefits and Features The DS28E16 secure authenticator combines FIPS202- Robust Countermeasures Protect Against Security compliant Secure Hash Algorithm (SHA-3) challenge and Attacks response authentication with secured EEPROM. All Stored Data Cryptographically Protected from Discovery The device provides a core set of cryptographic tools derived from integrated blocks including a SHA-3 engine, Efficient Secure Hash Algorithm Authenticates 256 bits of secured user EEPROM, a decrement-only Peripherals counter and a unique 64-bit ROM identification number FIPS 202-Compliant SHA-3 Algorithm for (ROM ID). The unique ROM ID is used as a fundamental Challenge/Response Authentication FIPS 198-Compliant Keyed-Hash Message input parameter for cryptographic operations and serves as an electronic serial number within the application. The Authentication Code (HMAC) device communicates over the single-contact 1-Wire bus. Supplemental Features Enable Easy Integration into The communication follows the 1-Wire protocol with the End Applications ROM ID acting as node address in the case of a multidevice 17-Bit One-Time Settable, Nonvolatile Decrement- 1-Wire network. Only Counter with Authenticated Read Secure Storage for Secrets Applications 256 Bits of Secure EEPROM for User Data Medical Tools/Accessories Authentication and Unique and Unalterable Factory Programmed Calibration 64-Bit Identification Number (ROM ID) Accessory and Peripheral Secure Authentication Advanced 1-Wire Protocol Minimizes Interface to Battery Authentication and Charge Cycle Tracking Single Contact Full-Time Overdrive Communication Speed Internal Parasite Power Capacitor 1-Wire is a registered trademark of Maxim Integrated Products, Inc. Operating Range: 1.71V3.63V, -40C to +85C WLP, TDFN-EP, and SFN Packages 8kV HBM ESD Protection (typ) 3.5A (typ) Input Load Current Typical Application Circuit V CC Ordering Information appears at end of data sheet. R P V CC V CC IO 2 I C SDA DS2477 PORT SCL C GPIO IO GND GND IO DS28E16 GND 19-100438 Rev 2 1/20DS28E16 1-Wire Secure SHA-3 Authenticator Absolute Maximum Ratings Voltage Range on Any Pin Relative to GND ..........-0.5V to 4.0V Storage Temperature Range ............................ -40C to +125C Maximum Current into Any Pin........................... -20mA to 20mA Lead Temperature (soldering, 10s) .................................+300C Operating Temperature Range ........................... -40C to +85C Soldering Temperature (reflow) .......................................+260C Junction Temperature ......................................................+150C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Information 6 WLP Package Code Z60E1+1 Outline Number 21-100327 Land Pattern Number Refer to Application Note 1891 Thermal Resistance, Four-Layer Board: Junction to Ambient ( ) 95.15C/W JA Junction to Case ( ) N/A JC 6 TDFN-EP Package Code T633+2 Outline Number 21-0137 Land Pattern Number 90-0058 Thermal Resistance, Single-Layer Board: Junction to Ambient ( ) 55C/W JA Junction to Case ( ) 9C/W JC Thermal Resistance, Four-Layer Board: Junction to Ambient ( ) 42C/W JA Junction to Case ( ) 9C/W JC 2 SFN (3.5mm x 5mm) Package Code S23A5N+1 Outline Number 21-0661 Land Pattern Number 90-0398 2 SFN (3.5mm x 6.5mm) Package Code T23A6N+1 Outline Number 21-0575 Land Pattern Number 90-0431 For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a +, , or - in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. Maxim Integrated 2 www.maximintegrated.com