DS80C390 Dual CAN High-Speed Microprocessor GENERAL DESCRIPTION FEATURES The DS80C390 is a fast 8051-compatible 80C52 Compatible microprocessor with dual CAN 2.0B controllers. The High-Speed Architecture redesigned processor core executes 8051 4kB Internal SRAM Usable as Program/ instructions up to 3X faster than the original for the Data/Stack Memory same crystal speed. The DS80C390 supports a Enhanced Memory Architecture maximum crystal speed of 40MHz, resulting in apparent execution speeds of 100MHz Two Full-Function CAN 2.0B Controllers (approximately 2.5X). An optional internal frequency Two Full-Duplex Hardware Serial Ports multiplier allows the microprocessor to operate at full Programmable IrDA Clock speed with a reduced crystal frequency, reducing High Integration Controller EMI. A hardware math accelerator further increases the speed of 32-bit and 16-bit multiply and divide 16 Interrupt Sources with Six External operations as well as high-speed shift, normalization, Available in 64-Pin LQFP, 68-Pin PLCC and accumulate functions. See page 29 for a complete list of features. The High-Speed Microcontroller Users Guide and High-Speed Microcontroller Users Guide: DS80C390 Supplement must be used in conjunction with this data sheet. Download both at: ORDERING INFORMATION www.maxim-ic.com/microcontrollers. PART TEMP RANGE PIN-PACKAGE DS80C390-QCR 0C to +70C 68 PLCC APPLICATIONS DS80C390-QCR+ 0C to +70C 68 PLCC Industrial Controls Agricultural Equipment DS80C390-QNR -40C to +85C 68 PLCC Factory Automation Gaming Equipment DS80C390-QNR+ -40C to +85C 68 PLCC Medical Equipment Heating, Ventilation, and DS80C390-FCR 0C to +70C 64 LQFP DS80C390-FCR+ 0C to +70C 64 LQFP Air Conditioning DS80C390-FNR -40C to +85C 64 LQFP DS80C390-FNR+ -40C to +85C 64 LQFP +Denotes a lead(Pb)-free/RoHS-compliant device. PIN CONFIGURATIONS 48 33 9 1 61 TOP VIEW 10 60 49 32 Dallas Semiconductor Dallas Semiconductor DS80C390 DS80C390 26 44 17 64 27 43 1 16 PLCC LQFP Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device m ay be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata. 1 of 52 REV: 050115 DS80C390 Dual CAN High-Speed Microprocessor ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground.-0.3V to (V + 0.5V) CC Voltage Range on V Relative to Ground-0.3V to +6.0V CC Operating Temperature Range..-40C to +85C Storage Temperature Range...-55C to +125C Soldering Temperature....See IPC/JEDEC J-STD-020 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (Note 10) PARAMETER SYMBOL MIN TYP MAX UNITS Supply Voltage V V 5.0 5.5 V CC RST Power-Fail Warning V 4.10 4.38 4.60 V PFW Minimum Operating Voltage V 3.85 4.13 4.35 V RST Supply Current, Active Mode (Note 1) I 80 150 mA CC Supply Current, Idle Mode (Note 2) I 40 75 mA IDLE Supply Current, Stop Mode (Note 3) I 1 120 A STOP Supply Current, Stop Mode, Bandgap Enabled (Note 3) I 150 350 A SPBG Input Low Level V -0.5 +0.8 V IL Input High Level V 2.0 V +0.5 V IH CC Input High Level for XTAL1, RST V 0.7 x V V +0.5 V IH2 CC CC Output Low Voltage for Port 1, 3, 4, 5 at I = 1.6mA V 0.45 V OL OL1 Output Low Voltage for Port 0, 1, 2, 4, 5, RD, WR, RSTOL, PSEN, V 0.45 V OL2 and ALE at I = 3.2mA (Note 5) OL Output High Voltage for Port 1, 3, 4, 5 at I = -50 A (Note 4) V 2.4 V OH OH1 Output High Voltage for Port 1, 3, 4, 5 at I = -1.5mA (Note 6) V 2.4 V OH OH2 Output High Voltage for Port 0, 1, 2, 4, 5, RD, WR, RSTOL, PSEN, V 2.4 V OH3 and ALE at I = -8mA (Note 5, 7) OH Input Low Current for Port 1, 3, 4, 5 at 0.45V (Note 8) I -55 IL A Logic 1 to 0 Transition Current for Port 1, 3, 4, 5 (Note 9) I -650 T1 A Input Leakage Current for Port 0 (Input Mode Only) I -300 +300 A L RST Pulldown Resistance R 50 170 k RST Note 1: Active current measured with 40MHz clock source on XTAL1, V = RST = 5.5V, all other pins disconnected. CC Note 2: Idle mode current measured with 40MHz clock source on XTAL1, V = 5.5V, RST = EA = V , all other pins disconnected. CC SS Note 3: Stop mode current measured with XTAL1 = RST = EA = V , V = 5.5V, all other pins disconnected. SS CC Note 4: RST = V . This condition mimics operation of pins in I/O mode. CC Note 5: Applies to port pins when they are used to address external memory or as CAN interface signals. Note 6: This measurement reflects the port during a 0-to-1 transition in I/O mode. During this period a one-shot circuit drives the ports hard for two clock cycles. If a port 4 or 5 pin is functioning in memory mode with pin state of 0 and the SFR bit contains a 1, changing the pin to an I/O mode (by writing to P4CNT) will not enable the 2-cycle strong pullup. During Stop or Idle mode the pins switch to I/O mode, and so port 2 and port 1 (in nonmultiplexed mode) will not exhibit the 2-cycle strong pullup when entering Stop or Idle mode. Note 7: Port 3 pins 3.6 and 3.7 have a stronger than normal pullup drive for one oscillator period following the transition of either the RD or WR from a 0-to-1 transition. Note 8: This is the current required from an external circuit to hold a logic low level on an I/O pin while the corresponding port latch bit is set to 1. This is only the current required to hold the low level transitions from 1 to 0 on an I/O pin also have to overcome the transition current. Note 9: Ports 1(in I/O mode), 3, 4, and 5 source transition current when being pulled down externally. It reaches its maximum at approximately 2V. Note 10: Specifications to -40C are guaranteed by design and not production tested. 2 of 52