A1 W1 B1 A2 W2 B2 W3 B3 W4 B4 2 Quad Channel, 128-/256-Position, I C, Nonvolatile Digital Potentiometer Data Sheet AD5123/AD5143 FEATURES FUNCTIONAL BLOCK DIAGRAM V DD 10 k and 100 k resistance options Resistor tolerance: 8% maximum AD5123/AD5143 Wiper current: 6 mA POWER-ON RDAC1 RESET Low temperature coefficient: 35 ppm/C INPUT REGISTER 1 Wide bandwidth: 3 MHz Fast start-up time < 75 s RDAC2 Linear gain setting mode INPUT REGISTER 2 SCL Single- and dual-supply operation SERIAL RDAC3 Wide operating temperature: 40C to +125C SDA INTERFACE 7/8 INPUT 3 mm 3 mm package ADDR REGISTER 3 APPLICATIONS RDAC4 INPUT Portable electronics level adjustment REGISTER 4 LCD panel brightness and contrast controls EEPROM Programmable filters, delays, and time constants MEMORY Programmable power supplies GND V SS Figure 1. GENERAL DESCRIPTION Table 1. Family Models The AD5123/AD5143 potentiometers provide a nonvolatile Model Channel Position Interface Package 1 2 solution for 128-/256-position adjustment applications, offering AD5123 Quad 128 IC LFCSP 2 guaranteed low resistor tolerance errors of 8% and up to 6 mA AD5124 Quad 128 SPI/IC LFCSP current density in the Ax, Bx, and Wx pins. AD5124 Quad 128 SPI TSSOP 2 AD5143 Quad 256 IC LFCSP The low resistor tolerance and low nominal temperature coefficient 2 AD5144 Quad 256 SPI/IC LFCSP simplify open-loop applications as well as applications requiring AD5144 Quad 256 SPI TSSOP tolerance matching. 2 AD5144A Quad 256 IC TSSOP The linear gain setting mode allows independent programming AD5122 Dual 128 SPI LFCSP/TSSOP of the resistance between the digital potentiometer terminals, 2 AD5122A Dual 128 IC LFCSP/TSSOP through the R and R string resistors, allowing very accurate AW WB AD5142 Dual 256 SPI LFCSP/TSSOP resistor matching. 2 AD5142A Dual 256 IC LFCSP/TSSOP 2 The high bandwidth and low total harmonic distortion (THD) AD5121 Single 128 SPI/IC LFCSP 2 ensure optimal performance for ac signals, making the devices AD5141 Single 256 SPI/IC LFCSP suitable for filter design. 1 Two potentiometers and two rheostats. The low wiper resistance of only 40 at the ends of the resistor array allows for pin to pin connection. 2 The wiper values can be set through an I C-compatible digital interface that also reads back the wiper register and EEPROM contents. The AD5123/AD5143 are available in a compact, 16-lead, 3 mm 3 mm LFCSP. The devices are guaranteed to operate over the extended industrial temperature range of 40C to +125C. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20122016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 10878-001AD5123/AD5143 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 19 Applications ....................................................................................... 1 RDAC Register and EEPROM .................................................. 19 Functional Block Diagram .............................................................. 1 Input Shift Register .................................................................... 19 2 General Description ......................................................................... 1 I C Serial Data Interface ............................................................ 19 2 Revision History ............................................................................... 2 I C Address .................................................................................. 19 Specif icat ions ..................................................................................... 3 Advanced Control Modes ......................................................... 21 Electrical CharacteristicsAD5123 .......................................... 3 EEPROM or RDAC Register Protection ................................. 22 Electrical CharacteristicsAD5143 .......................................... 6 RDAC Architecture .................................................................... 25 Interface Timing Specifications .................................................. 9 Programming the Variable Resistor ......................................... 25 Shift Register and Timing Diagrams ....................................... 10 Programming the Potentiometer Divider ............................... 26 Absolute Maximum Ratings .......................................................... 11 Terminal Voltage Operating Range ......................................... 26 Thermal Resistance .................................................................... 11 Power-Up Sequence ................................................................... 26 ESD Caution ................................................................................ 11 Layout and Power Supply Biasing ............................................ 26 Pin Configuration and Function Descriptions ........................... 12 Outline Dimensions ....................................................................... 27 Typical Performance Characteristics ........................................... 13 Ordering Guide .......................................................................... 27 Test Circuits ..................................................................................... 18 REVISION HISTORY 2/16Rev. A to Rev. B Changes to Features Section............................................................ 1 Added Endnote, Table 2 ................................................................... 5 Added Endnote, Table 3 ................................................................... 8 Changes to Table 5 .......................................................................... 11 Changes to Figure 4 ........................................................................ 12 Change to Table 9 ........................................................................... 20 3/13Rev. 0 to Rev. A Changes to Features Section............................................................ 1 10/12Revision 0: Initial Version Rev. B Page 2 of 28