2 10-Bit nanoDAC with SPI/I C Interface and 2 ppm/C On-Chip Reference Data Sheet AD5310R/AD5311R FEATURES FUNCTIONAL BLOCK DIAGRAMS V V V LOGIC REF DD High relative accuracy (INL): 0.5 LSB maximum Low drift 2.5 V reference: 2 ppm/C typical POWER-ON AD5310R 2.5V RESET Selectable span output: 2.5 V or 5 V REF LDAC Total unadjusted error (TUE): 0.06% of FSR maximum REF Offset error: 1.5 mV maximum DAC OUTPUT V 10-BIT REGISTER OUT BUFFER DAC Gain error: 0.05% of FSR maximum RESET Low glitch: 0.1 nV-sec High drive capability: 20 mA INPUT POWER-DOWN RESISTOR CONTROL LOGIC CONTROL LOGIC NETWORK Low power: 1.2 mW at 3.3 V Independent logic supply: 1.8 V logic compatible Wide operating temperature range: 40C to +105C SYNC SCLK SDI GND Robust 4 kV HBM ESD protection Figure 1. AD5310R APPLICATIONS V V V LOGIC REF DD Process controls Data acquisition systems POWER-ON AD5311R 2.5V RESET REF LDAC Digital gain and offset adjustment Programmable voltage sources REF DAC OUTPUT V Optical modules 10-BIT REGISTER OUT BUFFER DAC RESET INPUT POWER-DOWN GENERAL DESCRIPTION RESISTOR CONTROL LOGIC CONTROL LOGIC NETWORK The AD5310R/AD5311R, members of the nanoDAC family, are low power, single-channel, 10-bit buffered voltage output DACs. The devices include an enabled by default internal 2.5 V SDA SCL A0 GND reference, and provides 2 ppm/C. The output span can be Figure 2. AD5311R programmed to be 0 V to VREF or 0 V to 2 VREF. All devices operate from a single 2.7 V to 5.5 V supply and are guaranteed Table 1. Related Devices monotonic by design. The devices are available in 10-lead Interface Reference 12-Bit 10-Bit 1 MSOP packages. SPI External AD5681R AD5310 2 1 I C External AD5311 The internal power-on reset circuit of the AD5310R/AD5311R ensures that the DAC register is written to zero scale at powerup 1 The AD5310R and AD5311R are not pin-to-pin or software compatible with when the internal output buffer is configured in normal mode. the AD5310 and AD5311, respectively. The devices contain a power-down mode that reduces the PRODUCT HIGHLIGHTS current consumption of the device to 2 A at 5 V. 2 1. High Relative Accuracy (INL): 0.5 LSB maximum. The AD5310R/AD5311R use a versatile SPI or I C interface, 2. Low Drift 2.5 V On-Chip Reference: 5 ppm/C maximum RESET including an asynchronous pin and a VLOGIC pin that temperature coefficient. provides 1.8 V compatibility. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20142017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 11956-002 11956-001AD5310R/AD5311R Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Transfer Function ....................................................................... 17 Applications ....................................................................................... 1 DAC Architecture....................................................................... 17 General Description ......................................................................... 1 Serial Interface ................................................................................ 18 Functional Block Diagrams ............................................................. 1 AD5310R SPI Serial Data Interface ......................................... 18 Product Highlights ........................................................................... 1 Daisy-Chain Mode Compatibility ............................................ 18 2 Revision History ............................................................................... 2 AD5311R I C Serial Data Interface.......................................... 19 Specifications ..................................................................................... 3 Commands .................................................................................. 21 AC Characteristics ........................................................................ 4 LDAC Load DAC (Hardware Pin) ........................................... 22 Timing Characteristics ................................................................ 5 RESET Hardware ........................................................................ 22 Absolute Maximum Ratings ............................................................ 8 2 AD5311R, I C Read Operation ................................................ 22 Thermal Resistance ...................................................................... 8 Thermal Hysteresis .................................................................... 23 ESD Caution .................................................................................. 8 Power-Up Sequence ................................................................... 23 Pin Configurations and Function Descriptions ........................... 9 Layout Guidelines....................................................................... 23 Typical Performance Characteristics ........................................... 11 Outline Dimensions ....................................................................... 24 Terminology .................................................................................... 16 Ordering Guide .......................................................................... 24 Theory of Operation ...................................................................... 17 Digital-to-Analog Converter .................................................... 17 REVISION HISTORY 2/2017Rev. A to Rev. B 1/2014Rev. 0 to Rev. A Changes to Features Section and Table 1 ...................................... 1 Change to Features Section .............................................................. 1 Changed 1.8 V VLOGIC 5.5 V (VLOGIC = 1.8 V to 5.5 V) to Removed Endnote 2, Endnote 3, Endnote 5, and Endnote 6, 1.62 V VLOGIC 5.5 V ...................................................................... 3 Table 2 Renumbered Sequentially .................................................. 3 Changed 1.8 V V V to 1.62 V V 5.5 V ............ 4 Removed Endnote 3, Table 3............................................................ 4 LOGIC DD LOGIC Changes to V Parameter, Table 2 ............................................ 4 Removed Endnote 1, Table 4 Renumbered Sequentially ............ 5 LOGIC Changed V = 1.8 V to 5.5 V to 1.62 V V 5.5 V ........ 5 Changes to Table 6 ............................................................................. 8 LOGIC LOGIC Changes to Table 4 and Figure 3 ............................................................... 5 Removed Solder Heat Reflow Section and Figure 44 Changed VLOGIC = 1.8 V to 5.5 V to 1.62 V VLOGIC 5.5 V ........ 6 Renumbered Sequentially ............................................................. 23 Changes to Table 8 ............................................................................ 9 Changes to Table 9 .......................................................................... 10 1/2014Revision 0: Initial Version Changes to Terminology Section.................................................. 16 Changes to Transfer Function Section ......................................... 17 Rev. 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