2.7 V to 5.5 V, 140 A, Rail-to-Rail Output 12-Bit DAC in an SOT-23 AD5320 FEATURES FUNCTIONAL BLOCK DIAGRAM Single 12-bit DAC V DD GND 6-lead SOT-23 and 8-lead MSOP packages Micropower operation: 140 A 5 V AD5320 POWER-ON Power-down to 200 nA 5 V, 50 nA 3 V RESET 2.7 V to 5.5 V power supply REF (+) REF () Guaranteed monotonic by design OUTPUT DAC V OUT 12-BIT BUFFER REGISTER Reference derived from power supply DAC Power-on reset to zero volts Three power-down functions INPUT CONTROL POWER-DOWN REGISTER Low power serial interface with Schmitt-triggered inputs CONTROL LOGIC LOGIC NETWORK On-chip output buffer amplifier, rail-to-rail operation SYNC interrupt facility APPLICATIONS Portable battery-powered instruments SYNC SCLK DIN Digital gain and offset adjustment Figure 1. Programmable voltage and current sources Programmable attenuators GENERAL DESCRIPTION 1 The AD5320 is one of a family of pin-compatible DACs. The The AD5320 is a single, 12-bit buffered voltage out digital-to- AD5300 is the 8-bit version and the AD5310 is the 10-bit analog converter (DAC) that operates from a single 2.7 V to version. The AD5300/AD5310/AD5320 are available in 6-lead 5.5 V supply consuming 115 A at 3 V. Its on-chip precision SOT-23 packages and 8-lead MSOP packages. output amplifier allows rail-to-rail output swing to be achieved. The AD5320 utilizes a versatile 3-wire serial interface that PRODUCT HIGHLIGHTS operates at clock rates up to 30 MHz and is compatible with 1. Available in 6-lead SOT-23 and 8-lead MSOP packages. standard SPI, QSPI, MICROWIRE and digital signal processing (DSP) interface standards. 2. Low power, single-supply operation. This part operates from a single 2.7 V to 5.5 V supply and typically consumes The reference for AD5320 is derived from the power supply 0.35 mW at 3 V and 0.7 mW at 5 V, making it ideal for inputs and thus gives the widest dynamic output range. The battery-powered applications. part incorporates a power-on reset circuit that ensures that the DAC output powers up to zero volts and remains there until a 3. The on-chip output buffer amplifier allows the output of valid write takes place to the device. The part contains a power- the DAC to swing rail-to-rail with a slew rate of 1 V/s. down feature that reduces the current consumption of the device to 200 nA at 5 V and provides software selectable output 4. Reference derived from the power supply. loads while in power-down mode. The part is put into power- 5. High speed serial interface with clock speeds up to down mode over the serial interface. 30 MHz. Designed for very low power consumption. The The low power consumption of this part in normal operation interface only powers up during a write cycle. makes it ideally suited to portable, battery-operated equipment. 6. Power-down capability. When powered down, the DAC The power consumption is 0.7 mW at 5 V reducing to 1 W in typically consumes 50 nA at 3 V and 200 nA at 5 V. power-down mode. 1 Patent pending protected by U.S. Patent No. 5684481. Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 00934-001AD5320 TABLE OF CONTENTS Features .............................................................................................. 1 Serial Interface ................................................................................ 12 Applications....................................................................................... 1 Input Shift Register .................................................................... 12 Functional Block Diagram .............................................................. 1 SYNC Interrupt .......................................................................... 12 General Description ......................................................................... 1 Power-On Reset.......................................................................... 12 Product Highlights ........................................................................... 1 Power-Down Modes .................................................................. 13 Revision History ............................................................................... 2 Microprocessor Interfacing........................................................... 14 Specifications..................................................................................... 3 AD5320 to ADSP-2101/ADSP-2103 Interface ....................... 14 Timing Characteristics ................................................................ 4 AD5320 to 68HC11/68L11 Interface....................................... 14 Absolute Maximum Ratings............................................................ 5 AD5320 to 80C51/80L51 Interface .......................................... 14 ESD Caution.................................................................................. 5 AD5320 to MICROWIRE Interface......................................... 14 Pin Configurations and Function Descriptions ........................... 6 Applications..................................................................................... 15 Terminology ...................................................................................... 7 Using REF19x as a Power Supply for AD5320 ....................... 15 Typical Performance Characteristics ............................................. 8 Bipolar Operation Using the AD5320 ..................................... 15 Theory of Operation ...................................................................... 11 Using AD5320 with an Opto-Isolated Interface .................... 15 D/A Section................................................................................. 11 Power Supply Bypassing and Grounding................................ 16 Resistor String............................................................................. 11 Outline Dimensions....................................................................... 17 Output Amplifier........................................................................ 11 Ordering Guide .......................................................................... 17 REVISION HISTORY 11/05Rev. B to Rev. C Updated Format..................................................................Universal Changes to Table 4............................................................................ 6 Updated Outline Dimensions ....................................................... 17 Changes to Ordering Guide .......................................................... 17 Rev. C Page 2 of 20