EVAL-AD5361EBZ Analog Devices

16-Channel, 16-/14-Bit, Serial Input, Voltage-Output DAC AD5360/AD5361 FEATURES SPI-compatible serial interface 2.5 V to 5.5 V digital interface 16-channel DAC in 52-lead LQFP and 56-lead LFCSP RESET Digital reset ( ) packages Clear function to user-defined SIGGNDx Guaranteed monotonic to 16/14 bits Simultaneous update of DAC outputs Nominal output voltage range of 10 V to +10 V Multiple output spans available APPLICATIONS Temperature monitoring function Instrumentation Channel monitoring multiplexer Industrial control systems GPIO function Level setting in automatic test equipment (ATE) System calibration function allowing user-programmable Variable optical attenuators (VOA) offset and gain Optical line cards Channel grouping and addressing features Data error checking feature FUNCTIONAL BLOCK DIAGRAM DV V V CC AGND DGND LDAC DD SS TEMP VREF0 TEMP OUT SENSOR n = 16 FOR AD5360 GROUP 0 8 n = 14 FOR AD5361 CONTROL BUFFER 14 14 PEC OFFSET REGISTER OFS0 DAC 0 REGISTER VOUT0 TO 8 MON IN0 8 A/B SELECT TO VOUT15 BUFFER REGISTER MUX 2s 6 MON IN1 OUTPUT BUFFER VOUT0 n n n n X2A REGISTER DAC 0 AND POWER- MUX n A/B MUX DAC 0 X1 REGISTER REGISTER DOWN CONTROL VOUT1 MUX 2 X2B REGISTER n n VOUT2 M REGISTER MON OUT n n VOUT3 C REGISTER 2 GPIO VOUT4 GPIO REGISTER VOUT5 BIN/2SCOMP VOUT6 OUTPUT BUFFER VOUT7 n n n AND POWER- X2A REGISTER n n A/B MUX DAC 7 SYNC X1 REGISTER DOWN CONTROL DAC 7 MUX 2 REGISTER SIGGND0 X2B REGISTER n SDI n SERIAL M REGISTER n INTERFACE SCLK n C REGISTER VREF1 SDO GROUP 1 14 n OFFSET OFS1 BUSY DAC 1 REGISTER 8 8 A/B SELECT TO BUFFER REGISTER MUX 2s RESET OUTPUT BUFFER VOUT8 n n n n X2A REGISTER DAC 0 AND POWER- n A/B MUX CLR DAC 0 X1 REGISTER REGISTER DOWN CONTROL VOUT9 MUX 2 X2B REGISTER n n VOUT10 M REGISTER STATE n n VOUT11 MACHINE C REGISTER VOUT12 n VOUT13 VOUT14 OUTPUT BUFFER VOUT15 n n X2A REGISTER n n AND POWER- n DAC 7 A/B MUX X1 REGISTER DAC 7 DOWN CONTROL REGISTER MUX 2 SIGGND1 AD5360/ X2B REGISTER n n AD5361 M REGISTER n n C REGISTER Figure 1. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 20072008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 05761-007AD5360/AD5361 TABLE OF CONTENTS Features .............................................................................................. 1 Reset Function ............................................................................ 19 Applications ....................................................................................... 1 Clear Function ............................................................................ 19 Functional Block Diagram .............................................................. 1 BUSY and LDAC Functions...................................................... 19 Revision History ............................................................................... 2 BIN/2SCOMP PIN ..................................................................... 19 General Description ......................................................................... 3 Temperature Sensor ................................................................... 19 Specif icat ions ..................................................................................... 4 Monitor Function ....................................................................... 20 AC Characteristics ........................................................................ 5 GPIO Pin ..................................................................................... 20 Timing Characteristics ................................................................ 6 Power-Down Mode .................................................................... 20 Absolute Maximum Ratings ............................................................ 9 Thermal Monitoring Function ................................................. 20 ESD Caution .................................................................................. 9 Toggle Mode ................................................................................ 20 Pin Configuration and Function Descriptions ........................... 10 Serial Interface ................................................................................ 21 Typical Performance Characteristics ........................................... 12 SPI Write Mode .......................................................................... 21 Terminology .................................................................................... 14 SPI Readback Mode ................................................................... 22 Functional Description .................................................................. 15 Register Update Rates ................................................................ 22 DAC Architecture ....................................................................... 15 Packet Error Checking ............................................................... 22 Channel Groups .......................................................................... 15 Channel Addressing and Special Modes ................................. 23 A/B Registers Gain/Offset Adjustment ................................... 16 Special Function Mode .............................................................. 24 Offset DACs ................................................................................ 16 Power Supply Decoupling ......................................................... 25 Output Amplifier ........................................................................ 17 Power Supply Sequencing ......................................................... 25 Transfer Function ....................................................................... 17 Interfacing Examples ...................................................................... 26 Reference Selection .................................................................... 17 Outline Dimensions ....................................................................... 27 Calibration ................................................................................... 18 Ordering Guide .......................................................................... 27 REVISION HISTORY 2/08Rev. 0 to Rev. A Added LFCSP Package ....................................................... Universal Change to DC Crosstalk Parameter ............................................... 4 Change to Power Dissipation Unloaded (P) Parameter .............. 5 Added t Parameter ......................................................................... 6 23 Change to Figure 4 ........................................................................... 7 Change to Table 5 Summary ........................................................... 9 Added Figure 8 ................................................................................ 10 Changes to Table 6 .......................................................................... 10 Changes to Calibration Section .................................................... 18 Changes to Reset Function Section .............................................. 19 Added Packet Error Checking Section ........................................ 22 Updated Outline Dimensions ....................................................... 27 Changes to Ordering Guide .......................................................... 27 10/07Revision 0: Initial Version Rev. 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