Quad, 12-/14-/16-Bit nanoDACs with 2 5 ppm/C On-Chip Reference, I C Interface Data Sheet AD5625R/AD5645R/AD5665R, AD5625/AD5665 FEATURES FUNCTIONAL BLOCK DIAGRAMS Low power, smallest pin-compatible, quad nanoDACs V V /V DD GND REFIN REFOUT AD5625R/AD5645R/AD5665R AD5625R/AD5645R/AD5665R 1.25V/2.5V REF 12-/14-/16-bit nanoDACs BUFFER On-chip, 2.5 V, 5 ppm/C reference in TSSOP INPUT DAC STRING V A OUT ADDR1 REGISTER REGISTER DAC A On-chip, 2.5 V, 10 ppm/C reference in LFCSP On-chip, 1.25 V, 10 ppm/C reference in LFCSP BUFFER ADDR2 INPUT DAC STRING V B AD5625/AD5665 OUT REGISTER REGISTER DAC B 12-/16-bit nanoDACs BUFFER SCL External reference only INPUT DAC STRING V C OUT REGISTER REGISTER DAC C 3 mm 3 mm, 10-lead LFCSP 14-lead TSSOP and SDA BUFFER 1.665 mm 2.245 mm, 12-ball WLCSP INPUT DAC STRING V D OUT REGISTER REGISTER DAC D 2.7 V to 5.5 V power supply Guaranteed monotonic by design POWER-ON RESET POWER-DOWN LOGIC Power-on reset to zero scale/midscale LDAC CLR POR Per channel power-down NOTES 1. THE FOLLOWING PINS ARE AVAILABLE ONLY ON 14-LEAD PACKAGE: Hardware LDAC and CLR functions ADDR2, LDAC, CLR, POR. 2 I C-compatible serial interface supports standard (100 kHz), Figure 1. AD5625R/AD5645R/AD5665R fast (400 kHz), and high speed (3.4 MHz) modes V V DD GND REFIN APPLICATIONS AD5625/AD5665 Process control BUFFER Data acquisition systems INPUT DAC STRING V A ADDR1 OUT REGISTER REGISTER DAC A Portable battery-powered instruments Digital gain and offset adjustment BUFFER ADDR2 INPUT DAC STRING V B Programmable voltage and current sources OUT REGISTER REGISTER DAC B Programmable attenuators BUFFER SCL INPUT DAC STRING GENERAL DESCRIPTION V C OUT REGISTER REGISTER DAC C The AD5625R/AD5645R/AD5665R and AD5625/AD5665 SDA BUFFER members of the nanoDAC family are low power, quad, 12-/ INPUT DAC STRING V D OUT REGISTER REGISTER DAC D 14-/16-bit, buffered voltage-out DACs with/without an on-chip POWER-ON RESET POWER-DOWN LOGIC reference. All devices operate from a single 2.7 V to 5.5 V supply, 2 are guaranteed monotonic by design, and have an I C-compatible LDAC CLR POR serial interface. NOTES 1. THE FOLLOWING PINS ARE AVAILABLE ONLY ON 14-LEAD PACKAGE: ADDR2, LDAC, CLR, POR. The AD5625R/AD5645R/AD5665R have an on-chip reference. Figure 2. AD5625/AD5665 The LFCSP versions of the AD5625R/AD5645R/AD5665R have a 1.25 V or 2.5 V, 10 ppm/C reference, giving a full-scale output The AD5625R/AD5645R/AD5665R and AD5625/AD5665 use a 2 range of 2.5 V or 5 V the TSSOP versions of the AD5625R/ 2-wire I C-compatible serial interface that operates in standard AD5645R/AD5665R have a 2.5 V, 5 ppm/C reference, giving a (100 kHz), fast (400 kHz), and high speed (3.4 MHz) modes. full-scale output range of 5 V. The WLCSP has a 1.25 V reference. Table 1. Related Devices The on-chip reference is off at power-up, allowing the use of an Device Number Description external reference. The internal reference is enabled via a software AD5025/AD5045/AD5065 Dual 12-/14-/16-bit DACs write. The AD5625/AD5665 require an external reference AD5624R/AD5644R/AD5664R, Quad SPI 12-/14-/16-bit DACs, voltage to set the output range of the DAC. AD5624/AD5664 with/without internal reference 2 AD5627R/AD5647R/AD5667R, Dual I C 12-/14-/16-bit DACs, The device incorporates a power-on reset circuit that ensures AD5627/AD5667 with/without internal reference that the DAC output powers up to 0 V (POR = GND) or midscale AD5666 Quad SPI 16-bit DAC with internal (POR = V ) and remains there until a valid write occurs. The DD reference on-chip precision output amplifier enables rail-to-rail output swing. Rev. F Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2007-2018 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. INTERFACE INTERFACE LOGIC LOGIC 06341-002 06341-001AD5625R/AD5645R/AD5665R, AD5625/AD5665 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 External Reference ..................................................................... 24 Applications ....................................................................................... 1 Serial Interface ............................................................................ 24 General Description ......................................................................... 1 Write Operation.......................................................................... 24 Functional Block Diagrams ............................................................. 1 Read Operation........................................................................... 24 Revision History ............................................................................... 2 High Speed Mode ....................................................................... 26 Specifications ..................................................................................... 3 Input Shift Register .................................................................... 26 SpecificationsAD5625R/AD5645R/AD5665R ..................... 3 Multiple Byte Operation ............................................................ 26 SpecificationsAD5625/AD5665 ............................................. 5 Broadcast Mode .......................................................................... 28 AC Characteristics ........................................................................ 7 LDAC Function .......................................................................... 28 2 I C Timing Specifications ............................................................ 8 Power-Down Modes .................................................................. 30 Absolute Maximum Ratings .......................................................... 10 Power-On Reset and Software Reset ....................................... 31 ESD Caution ................................................................................ 10 Internal Reference Setup (R Versions) .................................... 31 Pin Configurations and Function Descriptions ......................... 11 Applications Information .............................................................. 32 Typical Performance Characteristics ........................................... 13 Using a Reference as a Power Supply for the AD5625R/AD5645R/AD5665R and AD5625/ AD5665 ....... 32 Terminology .................................................................................... 21 Bipolar Operation Using the AD5625R/ AD5645R/AD5665R Theory of Operation ...................................................................... 23 and AD5625/AD5665 ................................................................ 32 Digital-to-Analog Converter (DAC) ....................................... 23 Power Supply Bypassing and Grounding ................................ 32 Resistor String ............................................................................. 23 Outline Dimensions ....................................................................... 33 Output Amplifier ........................................................................ 23 Ordering Guide .......................................................................... 34 Internal Reference ...................................................................... 23 REVISION HISTORY 10/2018Rev. E to Rev. F Changes to Serial Interface Section and Table 9 Title ............... 24 Changes to Serial Interface Section .............................................. 24 Changes to Figure 58 and Figure 60 Captions ............................ 25 Moved Ordering Guide Section.................................................... 34 Updated Outline Dimensions ....................................................... 33 Changes to Ordering Guide .......................................................... 35 1/2018Rev. D to Rev. E Change to Figure 6 ......................................................................... 11 12/2009Rev. A to Rev. B Added Figure 55 Renumbered Sequentially .............................. 20 Changes to Features Section, General Description Section, Change to Terminology Section ................................................... 21 and Table 1 ..........................................................................................1 Updated Outline Dimensions ....................................................... 33 Changes to Table 2 ............................................................................. 3 Changes to Ordering Guide .......................................................... 35 Changes to Internal Reference Section ........................................ 22 Updated Outline Dimensions ....................................................... 32 11/2015Rev. C to Rev. D Changes to Ordering Guide .......................................................... 33 Changes to Read Operation Section ............................................ 24 6/2009Rev. 0 to Rev. A 3/2013Rev. B to Rev. C Changes to Features and General Description Sections .............. 1 Added 12-Ball WLCSP ...................................................... Universal Changes to Table 2 ............................................................................. 3 Change to Features and General Description Sections ............... 1 Changes to Table 3 ............................................................................. 5 Changes to Reference Output (1.25 V), Reference TC Changes to Digital-to-Analog Converter (DAC) Section, Added Parameter, Table 2 ............................................................................. 4 Figure 54 and Figure 55, Renumbered Subsequent Figures ..... 22 Added JA Thermal Impedance, WLCSP Parameter, Table 6 ... 10 Changes to Ordering Guide .......................................................... 33 Added Figure 8 Renumbered Sequentially ................................ 12 Added Table 8 Renumbered Sequentially .................................. 12 3/2007Revision 0: Initial Version Changes to Internal Reference Section ........................................ 23 Rev. F Page 2 of 35