12-Bit Capacitance-to-Digital Converter Data Sheet AD7152/AD7153 FEATURES FUNCTIONAL BLOCK DIAGRAMS VDD Capacitance-to-digital converters AD7152 CAP+ Interfaces to floating sensors CAP CLOCK VOLTAGE Resolution down to 0.25 fF (that is, up to 12 ENOB) GENERATOR REFERENCE CIN1(+) Linearity: 0.05% CIN1() Common-mode (not changing) capacitance up to 5 pF SDA 2 I C EXC1 12-BIT - MUX SERIAL Four capacitance ranges selectable per operation mode MODULATOR CIN2(+) INTERFACE SCL CIN2() 0.25 pF to 2 pF in differential mode EXC2 0.5 pF to 4 pF in single-ended mode DIGITAL CONTROL LOGIC EXCITATION FILTER CALIBRATION Tolerant of parasitic capacitance to ground up to 50 pF Conversion time per channel: 5 ms, 20 ms, 50 ms, and 60 ms GND Internal clock oscillator Figure 1. 2 2-wire serial interface (I C-compatible) VDD Power AD7153 CAP+ 2.7 V to 3.6 V single-supply operation CLOCK VOLTAGE CAP GENERATOR REFERENCE 100 A current consumption Operating temperature: 40C to +85C CIN1(+) SDA 2 I C 10-lead MSOP 12-BIT - CIN1() MUX SERIAL MODULATOR INTERFACE SCL EXC1 APPLICATIONS EXCITATION DIGITAL CONTROL LOGIC Automotive, industrial, and medical systems for FILTER CALIBRATION Pressure measurement GND Position sensing Figure 2. Level sensing Flowmeters Humidity sensing GENERAL DESCRIPTION The AD7152/AD7153 are 12-bit sigma-delta (-) capacitance-to- The AD7153 has one capacitance input channel, while the digital converters (CDCs). The capacitance to be measured is AD7152 has two channels. Each channel can be configured connected directly to the device inputs. The architecture features as single-ended or differential. The AD7152/AD7153 are inherent high resolution (12-bit no missing codes, up to 12-bit designed for floating capacitive sensors. effective resolution) and high linearity (0.05%). The AD7152/ 2 The AD7152/AD7153 have a 2-wire, I C-compatible serial AD7153 have four capacitance input ranges per operation mode, interface. Both devices can operate with a single power supply 0.25 pF to 2 pF in differential mode and 0.5 pF to 4 pF in from 2.7 V to 3.6 V. They are specified over the temperature single-ended mode. range of 40C to +85C and are available in a 10-lead MSOP. The AD7152/AD7153 can accept up to 5 pF common-mode capacitance (not changing), which can be balanced by a programmable on-chip, digital-to-capacitance converter (CAPDAC). Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20082016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 07450-002 07450-001AD7152/AD7153 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Configuration Register .............................................................. 16 Applications ....................................................................................... 1 CAPDAC POS Register ............................................................. 17 Functional Block Diagrams ............................................................. 1 CAPDAC NEG Register ............................................................ 17 General Description ......................................................................... 1 Configuration2 Register ............................................................ 17 Revision History ............................................................................... 2 Circuit Description......................................................................... 18 Specifications ..................................................................................... 3 Capacitance-to-Digital Converter (CDC) .............................. 18 Timing Specifications .................................................................. 5 Excitation Source ........................................................................ 18 Absolute Maximum Ratings ............................................................ 6 CAPDAC ..................................................................................... 19 ESD Caution .................................................................................. 6 Single-Ended Capacitive Input ................................................. 19 Pin Configurations and Function Descriptions ........................... 7 Differential Capacitive Input .................................................... 20 Typical Performance Characteristics ............................................. 8 Parasitic Capacitance to Ground .............................................. 20 Serial Interface ................................................................................ 11 Parasitic Resistance to Ground ................................................. 20 Write Operation .......................................................................... 11 Parasitic Parallel Resistance ...................................................... 21 Read Operation ........................................................................... 11 Parasitic Serial Resistance ......................................................... 21 AD7152/AD7153 Reset .............................................................. 12 Input EMC Protection ............................................................... 21 General Call................................................................................. 12 Power Supply Decoupling and Filtering .................................. 21 Register Map .................................................................................... 13 Capacitive Gain Calibration ..................................................... 21 Status Register ............................................................................. 14 Capacitive System Offset Calibration ...................................... 21 Data Registers ............................................................................. 15 Typical Application Diagram .................................................... 22 Offset Calibration Registers ...................................................... 15 Outline Dimensions ....................................................................... 23 Gain Calibration Registers ........................................................ 15 Ordering Guide .......................................................................... 23 CAP Setup Registers .................................................................. 16 REVISION HISTORY 2/16Rev. 0 to Rev. A Change to Address 0x01, Address 0x02 for Channel 1, Address 0x03, Address 0x04 (AD7152 Only) for Channel 2, 16 Bits, Read-Only, Default Value 0x0000 Section .................................. 15 Updated Outline Dimensions ....................................................... 23 5/08Revision 0: Initial Version Rev. A Page 2 of 24