LED EVAL-AD7175-2SDZ User Guide UG-741 One Technology Way P.O. Box 9106 Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 www.analog.com Evaluating the AD7175-2 24-Bit, 250 kSPS, Sigma-Delta ADC with 20 s Settling and Integrated Analog Input Buffers FEATURES GENERAL DESCRIPTION Full featured evaluation board for the AD7175-2 The EVAL-AD7175-2SDZ evaluation kit features the AD7175-2, PC control in conjunction with the Analog Devices, Inc., a 24-bit, 250 kSPS analog-to-digital converter (ADC) with EVAL-SDP-CB1Z system demonstration platform (SDP) integrated rail-to rail-analog input buffers, on-board power PC software for control and data analysis (time domain) supply regulation, and an external amplifier section for amplifier Standalone capability evaluation. A 7 V to 9 V ac-to-dc adapter is regulated to 5 V and 3.3 V, which supply the AD7175-2 and support components. The EVALUATION KIT CONTENTS EVAL-AD7175-2SDZ evaluation board connects to the USB port EVAL-AD7175-2SDZ evaluation board of a PC via the EVAL-SDP-CB1Z (SDP-B) controller board. AD717x Eval+ software CD The AD717x Eval+ software fully configures the AD7175-2 device 7 V to 9 V ac-to-dc adapter functionality via an interactive block diagram and a user accessible Plastic screw washer set register interface and provides dc time domain analysis in the EQUIPMENT NEEDED form of waveform graphs, histograms, and associated noise analysis for ADC performance evaluation. DC signal source PC running Windows XP to Windows 10 Full specifications for the AD7175-2 are available in the product data sheet, which should be consulted in conjunction with this user guide when using the evaluation board. FUNCTIONAL BLOCK DIAGRAM 7V TO 9V VIN ADP7118 ADR445 ADP7118 ADP7104 5V LDO 5V VREF 3.3V LDO 5V LDO EXTERNAL ANALOG SIGNAL CONDITIONING PLAYGROUND REGCAPA REF REF+ REFOUT IOVDD REGCAPD AVDD1 AVDD2 BUFFERED ADA4528-2 ADA4528-2 REFERENCE 1.8V PRECISION 1.8V USB IN-AMP OPEN INPUT LDO REFERENCE LDO CONFIGURED CONFIG BUFFERS CROSSPOINT MULTIPLEXER ON-BOARD INT ANALOG NOISE TEST CS REF AVDD INPUT AIN0 SERIAL BUFFERS SCLK INTERFACE AND AIN1 DIN ADSP-BF527 CONTROL DIGITAL DOUT/RDY - ADC FILTER POWER SYNC AIN3 ERROR AIN4 XTAL AND INTERNAL INPUT/OUTPUT AVSS CLOCK OSCILLATOR CONTROL CIRCUITRY TO AD7175-2 SDP-B TEMPERATURE REFOUT PIN AD7175-2 LED SENSOR STATUS AVSS GPIO0 GPIO1 FROM XTAL1 XTAL2/CLKIO DGND 2.5V ADP7104 LDO AVSS OPTION AD8475 AMP ADP7182 10V INPUT SURF BOARD ADM660 VE LDO OPTION CONNECTOR Figure 1. PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. B Page 1 of 33 12528-001UG-741 EVAL-AD7175-2SDZ User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Reference Options .........................................................................7 Evaluation Kit Contents ................................................................... 1 Evaluation Board Software ...............................................................8 Equipment Needed ........................................................................... 1 Software Installation .....................................................................8 General Description ......................................................................... 1 Setting up the System for Data Capture .................................. 10 Functional Block Diagram .............................................................. 1 Launching the Software ............................................................. 10 Revision History ............................................................................... 2 Evaluation Board Software Operation ......................................... 11 EVAL-AD7175-2SDZ Quick Start Guide ....................................... 3 Overview of the Main Window ................................................ 12 Recommended Quick Start Guide ............................................. 3 Configuration Tab (1) ................................................................ 12 Quick Start Noise Test ................................................................. 3 Waveform Tab (18) ..................................................................... 14 Evaluation Board Hardware ............................................................ 4 Histogram Tab (28) .................................................................... 16 Device Description ....................................................................... 4 Modelled Performance Tab (31)............................................... 17 Hardware Link Options ............................................................... 4 Registers Tab (45) ....................................................................... 20 Sockets and Connectors .............................................................. 5 Exiting the Software ................................................................... 20 Serial Interface .............................................................................. 6 Evaluation Board Schematics and Artwork ................................ 21 Power Supplies .............................................................................. 6 Ordering Information .................................................................... 29 Power Supply Configurations ..................................................... 7 Bill of Materials ........................................................................... 29 Analog Inputs ................................................................................ 7 REVISION HISTORY 1/2018Rev. A to Rev. B Changed Register Map Tab (34) Section to Registers Tab (45) Section .............................................................................................. 20 Changed EVAL-SDP-CB1Z to SDP-B ......................... Throughout Changed AD7175-2 Eval+ to AD717x Eval+ ............ Throughout Changes to Registers Tab (45) Section and Figure 23 ............... 20 Changes to Evaluation Kit Contents Section, Equipment Added Evaluation Board Schematics and Artwork Section ..... 21 Needed Section, and General Description Section ...................... 1 Added Ordering Information Section and Table 4 .................... 29 Changes to Table 1 ............................................................................ 4 Changes to Table 2 ............................................................................ 5 6/2015Rev. 0 to Rev. A Changes to Power Supply Configuration Section ........................ 7 Changed Evaluation Software to Eval+ Software ...... Throughout Changes to Software Installation Section, Figure 3, Figure 3 Changes to Evaluation Kit Contents Section, General Description Section, and Figure 1 ......................................................................... 1 Caption, Figure 4, and Figure 4 Caption ....................................... 8 Added Figure 5 and Figure 6 Renumbered Sequentially ........... 8 Changes to Quick Start Noise Test Section and Figure 2 ............. 3 Added Figure 7 through Figure 11 ................................................. 9 Changes to Table 1 ............................................................................. 4 Added Setting Up the System for Data Capture Section ........... 10 Changes to Table 3 ............................................................................. 6 Added Figure 13 and Figure 14..................................................... 10 Changes to Single Supply (Unregulated) Section, Split Supply Changes to Launching the Software Section, Figure 12, Figure 12 (Regulated) Section, and Split Supply (Unregulated) Section ..... 7 Caption, Figure 15, and Figure 15 Caption ................................. 10 Changes to Evaluation Board Software Section ............................ 8 Changed to Software Operation Section to Evaluation Board Changes to Overview of the Main Window Section .................... 9 Added Evaluation Mode (2) Section, Analog Supply Voltage Software Operation Section .......................................................... 11 Changes to Figure 16 ...................................................................... 11 (9 and 13) Section, Digital Supply Voltage (10) Section, Analog Changes to Figure 17 ...................................................................... 12 Input Voltage (11) Section, External SCLK Frequency (12) Changes to Overview of the Main Window Section and Section, and External MCLK Frequency (14) Section ................. 9 Configuration Tab (1) Section ...................................................... 12 Changes to Figure 7 ........................................................................ 10 Changes to Waveform Tab (18) Section ...................................... 14 Added Figure 8 Renumbered Sequentially ................................ 11 Changes to Figure 18 and Figure 18 Caption ............................. 15 Changes to Figure 9 ........................................................................ 13 Changes to Histogram Tab (26) Section, Figure 19, and Figure Changes to Figure 10 ...................................................................... 14 19 Caption ....................................................................................... 16 Added Calculated Performance Tab (29) Section, Filter Profile Changed Calculated Performance Tab (29) Section to Modelled and Response (30 and 31) Section, Performance Summary (32) Performance Tab (31) Section....................................................... 17 Section, Timing Diagram (33) Section, and Figure 11 .............. 15 Changes to Modelled Performance Tab (31) Section, Figure 20, Changes to Figure 12 ...................................................................... 16 and Figure 20 Caption .................................................................... 17 Added Figure 21 .............................................................................. 18 11/2014Revision 0: Initial Version Added Figure 22 .............................................................................. 19 Rev. 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