24-Bit, 250 kSPS Sigma-Delta ADC with 20 s Settling Data Sheet AD7176-2 FEATURES GENERAL DESCRIPTION Fast and flexible output rate5 SPS to 250 kSPS The AD7176-2 is a fast settling, highly accurate, high resolution, Fast settling time20 s multiplexed - analog-to-digital converter (ADC) for low band- Channel scan data rate of 50 kSPS/channel width input signals. Its inputs can be configured as two fully Performance specifications differential or four pseudo differential inputs via the integrated 17 noise free bits at 250 kSPS crosspoint multiplexer. An integrated precision, 2.5 V, low drift 20 noise free bits at 2.5 kSPS (2 ppm/C), band gap internal reference (with an output 22 noise free bits at 5 SPS reference buffer) adds functionality and reduces the external INL 2.5 ppm of FSR component count. 85 dB rejection of 50 Hz and 60 Hz with 50 ms settling The maximum channel scan data rate is 50 kSPS/channel User-configurable input channels (settling time of 20 s), resulting in fully settled data with 2 fully differential or 4 pseudo differential 17 noise free bits. User-selectable output data rates range from Crosspoint multiplexer 5 SPS to 250 kSPS. The resolution increases at lower speeds. On-chip 2.5 V reference (drift 2 ppm/C) The AD7176-2 offers three key digital filters. The fast settling Internal oscillator, external crystal, or external clock sinc5 + sinc1 filter maximizes the channel scan rate. The sinc3 Power supply filter maximizes the resolution for single-channel, low speed Single supply: 5 V AVDD1, 2 V to 5 V AVDD2 and IOVDD applications. For 50 Hz and 60 Hz environments, the AD7176-2 Optional split supply: AVDD1 and AVSS 2.5 V specific filter minimizes the settling times or maximizes the Current: 7.8 mA rejection of the line frequency. These enhanced filters enable Temperature range: 40C to +105C simultaneous 50 Hz and 60 Hz rejection with a 27 SPS output 3- or 4-wire serial digital interface (Schmitt trigger on SCLK) data rate (with a settling time of 36 ms). CRC error checking SPI, QSPI, MICROWIRE, and DSP compatible System offset and gain errors can be corrected on a per channel basis. This per channel configurability extends to the output data APPLICATIONS rate used for each channel when using a sinc5 + sinc1 filter. All Process control: PLC/DCS modules switching of the crosspoint multiplexer is controlled by the ADC Temperature and pressure measurement and can be configured to automatically control an external Medical and scientific multichannel instrumentation multiplexer via the GPIO pins. Chromatography The specified operating temperature range is 40C to +105C. The AD7176-2 is housed in a 24-lead TSSOP package. FUNCTIONAL BLOCK DIAGRAM AVDD1 AVDD2 REGCAPA REF REF+ REFOUT IOVDD REGCAPD BUFFERED 1.8V 1.8V PRECISION LDO LDO REFERENCE INT REF AIN0 CS AIN1 SCLK SERIAL DIGITAL INTERFACE - ADC DIN AIN2 FILTER AND CONTROL DOUT/RDY AIN3 SYNC/ERROR GPIO AND XTAL AND INTERNAL MUX CLOCK OSCILLATOR AIN4 I/O CONTROL CIRCUITRY AD7176-2 CROSSPOINT MULTIPLEXER AVSS GPIO0 GPIO1 XTAL1 CLKIO/XTAL2 DGND Figure 1. Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20122016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 11037-001AD7176-2 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Delay ............................................................................................ 44 Applications ....................................................................................... 1 16-Bit/24-Bit Conversions......................................................... 44 General Description ......................................................................... 1 Serial Interface Reset (Dout Reset) ......................................... 44 Functional Block Diagram .............................................................. 1 Synchronization (SYNC/ERROR) ........................................... 44 Revision History ............................................................................... 3 Error Flags ................................................................................... 45 Specifications ..................................................................................... 4 DATA STAT ............................................................................... 45 Timing Characteristics ................................................................ 7 IOSTRENTGH ........................................................................... 45 Timing Diagrams .......................................................................... 7 Grounding and Layout .................................................................. 46 Absolute Maximum Ratings ............................................................ 8 Register Summary .......................................................................... 47 Thermal Resistance ...................................................................... 8 Register Details ............................................................................... 49 ESD Caution .................................................................................. 8 Communications Register ......................................................... 49 Pin Configuration and Function Descriptions ............................. 9 Status Register ............................................................................. 50 Typical Performance Characteristics ........................................... 11 ADC Mode Register ................................................................... 51 Noise Performance and Resolution .............................................. 17 Interface Mode Register ............................................................ 52 Getting Started ................................................................................ 18 Register Check ............................................................................ 53 Power Supplies ............................................................................ 19 Data Register ............................................................................... 53 Digital Communication ............................................................. 19 GPIO Configuration Register ................................................... 54 Configuration Overview ........................................................... 21 ID Register................................................................................... 55 Circuit Description ......................................................................... 26 Channel Map Register 0 ............................................................ 56 Analog Input ............................................................................... 26 Channel Map Register 1 ............................................................ 57 Driver Amplifiers ....................................................................... 26 Channel Map Register 2 ............................................................ 58 AD7176-2 Reference ................................................................... 29 Channel Map Register 3 ............................................................ 59 AD7176-2 Clock Source ............................................................. 30 Setup Configuration Register 0 ................................................ 60 Digital Filters ................................................................................... 31 Setup Configuration Register 1 ................................................ 60 Sinc5 + Sinc1 Filter..................................................................... 31 Setup Configuration Register 2 ................................................ 61 Sinc3 Filter ................................................................................... 32 Setup Configuration Register 3 ................................................ 61 Single Cycle Settling ................................................................... 32 Filter Configuration Register 0 ................................................. 62 Enhanced 50 Hz and 60 Hz Rejection Filters ......................... 34 Filter Configuration Register 1 ................................................. 63 Operating Modes ............................................................................ 37 Filter Configuration Register 2 ................................................. 64 Continuous Conversion Mode ................................................. 37 Filter Configuration Register 3 ................................................. 65 Continuous Read Mode ............................................................. 38 Offset Register 0 ......................................................................... 66 Single Conversion Mode ........................................................... 39 Offset Register 1 ......................................................................... 66 Standby and Power-Down Modes ............................................ 40 Offset Register 2 ......................................................................... 66 Calibration Modes ...................................................................... 40 Offset Register 3 ......................................................................... 66 Digital Interface .............................................................................. 41 Gain Register 0............................................................................ 67 Checksum Protection................................................................. 41 Gain Register 1............................................................................ 67 CRC Calculation ......................................................................... 42 Gain Register 2............................................................................ 67 Integrated Functions ...................................................................... 44 Gain Register 3............................................................................ 67 General-Purpose I/O ................................................................. 44 Outline Dimensions ....................................................................... 68 External Multiplexer Control .................................................... 44 Ordering Guide .......................................................................... 68 Rev. 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