Differential/Single-Ended Input, Dual 1 MSPS, 12-Bit, 3-Channel SAR ADC Data Sheet AD7265 FEATURES FUNCTIONAL BLOCK DIAGRAM REF SELECT D A AV DV CAP DD DD Dual 12-bit, 3-channel ADC Throughput rate: 1 MSPS REF BUF Specified for V of 2.7 V to 5.25 V DD AD7265 Power consumption V A1 7 mW at 1 MSPS with 3 V supplies V A2 17 mW at 1 MSPS with 5 V supplies 12-BIT V A3 SUCCESSIVE OUTPUT MUX T/H D A OUT Pin-configurable analog inputs APPROXIMATION DRIVERS V A4 ADC 12-channel single-ended inputs V A5 SCLK 6-channel fully differential inputs V A6 CS 6-channel pseudo differential inputs RANGE SGL/DIFF CONTROL 70 dB SINAD at 50 kHz input frequency LOGIC A0 Accurate on-chip reference: 2.5 V A1 A2 0.2% maximum at 25C, 20 ppm/C maximum V B1 V B2 Dual conversion with read 875 ns, 16 MHz SCLK V DRIVE V High speed serial interface B3 MUX 12-BIT V OUTPUT B4 SUCCESSIVE SPI-/QSPI-/MICROWIRE-/DSP-compatible D B T/H OUT DRIVERS APPROXIMATION V ADC B5 40C to +125C operation V B6 Shutdown mode: 1 A maximum BUF 32-lead LFCSP and 32-lead TQFP 2 MSPS version, AD7266 AGND AGND AGND D B DGND DGND CAP GENERAL DESCRIPTION 1 Figure 1. The AD7265 is a dual, 12-bit, high speed, low power, successive approximation ADC that operates from a single 2.7 V to 5.25 V PRODUCT HIGHLIGHTS power supply and features throughput rates of up to 1 MSPS. The 1. Two Complete ADC Functions Allow Simultaneous device contains two ADCs, each preceded by a 3-channel Sampling and Conversion of Two Channels. multiplexer, and a low noise, wide bandwidth track-and-hold Each ADC has three fully/pseudo differential pairs, or six amplifier that can handle input frequencies in excess of 30 MHz. single-ended channels, as programmed. The conversion The conversion process and data acquisition use standard result of both channels is simultaneously available on control inputs allowing easy interfacing to microprocessors or separate data lines, or in succession on one data line if only CS DSPs. The input signal is sampled on the falling edge of one serial port is available. conversion is also initiated at this point. The conversion time is 2. High Throughput with Low Power Consumption. determined by the SCLK frequency. The AD7265 uses advanced The AD7265 offers a 1 MSPS throughput rate with 9 mW design techniques to achieve very low power dissipation at high maximum power dissipation when operating at 3 V. throughput rates. With 5 V supplies and a 1 MSPS throughput rate, 3. The AD7265 offers both a standard 0 V to VREF input range the part consumes 4 mA maximum. The part also offers flexible and a 2 VREF input range. power/throughput rate management when operating in normal mode, because the quiescent current consumption is so low. 4. No Pipeline Delay. The part features two standard successive approximation The analog input range for the part can be selected to be a 0 V CS ADCs with accurate control of the sampling instant via a to V (or 2 V ) range, with either straight binary or twos REF REF input and once off conversion control. complement output coding. The AD7265 has an on-chip 2.5 V reference that can be overdriven when an external reference is 1 Protected by U.S. Patent No. 6,681,332. preferred. This external reference range is 100 mV to VDD. The AD7265 is available in 32-lead LFCSP and 32-lead TQFP. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20052018 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 04674-001AD7265 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Digital Inputs .............................................................................. 18 General Description ......................................................................... 1 VDRIVE ............................................................................................ 18 Functional Block Diagram .............................................................. 1 Modes of Operation ....................................................................... 19 Product Highlights ........................................................................... 1 Normal Mode .............................................................................. 19 Revision History ............................................................................... 2 Partial Power-Down Mode ....................................................... 19 Specifications ..................................................................................... 3 Full Power-Down Mode ............................................................ 20 Timing Specifications .................................................................. 5 Power-Up Times ......................................................................... 21 Absolute Maximum Ratings ............................................................ 6 Power vs. Throughput Rate ....................................................... 21 ESD Caution .................................................................................. 6 Serial Interface ................................................................................ 22 Pin Configurations and Function Descriptions ........................... 7 Microprocessor Interfacing ........................................................... 23 Typical Performance Characteristics ............................................. 9 AD7265 to ADSP-2181 .............................................................. 23 Terminology .................................................................................... 11 AD7265 to ADSP-BF531 ........................................................... 24 Theory of Operation ...................................................................... 13 AD7265 to TMS320C541 .......................................................... 24 Circuit Information .................................................................... 13 AD7265 to DSP563xx ................................................................ 25 Converter Operation .................................................................. 13 Application Hints ........................................................................... 26 Analog Input Structure .............................................................. 13 Grounding and Layout .............................................................. 26 Analog Inputs .............................................................................. 14 PCB Design Guidelines for LFCSP .......................................... 26 Analog Input Selection .............................................................. 17 Evaluating the AD7265 Performance ...................................... 26 Output Coding ............................................................................ 17 Outline Dimensions ....................................................................... 27 Transfer Functions...................................................................... 18 Ordering Guide .......................................................................... 27 REVISION HISTORY 1/2018Rev. B to Rev. C 11/2006Rev. 0 to Rev. A Changed CP-32-7 to CP-32-2 ...................................... Throughout Changes to Format ............................................................. Universal Changes to Figure 2 .......................................................................... 7 Changes to Reference Input/Output Section ................................. 4 Changed AD7265 to ADSP-218x Section Heading to AD7265 to Changes to Table 4 ............................................................................. 7 ADSP-2181 Section Heading ........................................................ 23 Changes to Terminology Section ................................................. 11 Changes to AD7265 to ADSP-2181 Section and Figure 43 ...... 23 Changes to Figure 24 and Differential Mode Section ............... 15 Changed AD7265 to ADSP-BF53x Section Heading to AD7265 Changes to Figure 29 ...................................................................... 16 to ADSP-BF532 Section Heading ................................................. 24 Changes to AD7265 to ADSP-BF53x Section ............................ 24 Changes to AD7265 to ADSP-BF532 Section and Figure 44 ... 24 Updated Outline Dimensions ....................................................... 27 Updated Outline Dimensions ....................................................... 27 Changes to Ordering Guide .......................................................... 27 Changes to Ordering Guide .......................................................... 27 4/2005Revision 0: Initial Version 1/2017Rev. A to Rev. B Changed CP-32-2 to CP-32-7 ...................................... Throughout Changes to Figure 2 .......................................................................... 7 Updated Outline Dimensions ....................................................... 27 Changes to Ordering Guide .......................................................... 27 Rev. C Page 2 of 27