8-Channel DAS with 18-Bit, Bipolar, Simultaneous Sampling ADC Data Sheet AD7608 FEATURES APPLICATIONS 8 simultaneously sampled inputs Power line monitoring and protection systems True bipolar analog input ranges: 10 V, 5 V Multiphase motor controls Single 5 V analog supply and 2.3 V to 5.25 V V Instrumentation and control systems DRIVE Fully integrated data acquisition solution Multiaxis positioning systems Analog input clamp protection Data acquisition systems (DAS) Input buffer with 1 M analog input impedance COMPANION PRODUCTS Second-order antialiasing analog filter External References: ADR421, ADR431 On-chip accurate reference and reference buffer Digital Isolators: ADuM1402, ADuM5000, ADuM5402 18-bit ADC with 200 kSPS on all channels Voltage Regulator Design Tool: ADIsimPower, Supervisor Oversampling capability with digital filter Parametric Search Flexible parallel/serial interface Complete list of complements on AD7608 product page SPI/QSPI/MICROWIRE/DSP compatible Pin compatible solutions from 14-bits to 18-bits Table 1. High Resolution, Bipolar Input, Simultaneous Performance Sampling DAS Solutions 7 kV ESD rating on analog input channels Single- True Number of 98 dB SNR, 107 dB THD Ended Differential Simultaneous Low power: 100 mW Resolution Inputs Inputs Sampling Channels 1 18 Bits AD7608 AD7609 8 Standby mode: 25 mW 16 Bits AD7606B 8 64-lead LQFP package AD7606 8 AD7606-6 6 AD7606-4 4 14 Bits AD7607 8 1 Protected by U.S. Patent Number 8,072,360. FUNCTIONAL BLOCK DIAGRAM AV AV REGCAP REGCAP REFCAPB REFCAPA CC CC R 1M FB V1 CLAMP T/H SECOND V1GND CLAMP ORDER LPF 2.5V 2.5V R 1M FB LDO LDO 1M R FB REFIN/REFOUT V2 CLAMP T/H SECOND V2GND CLAMP ORDER LPF R 1M FB REF SELECT 2.5V REF AGND 1M R FB V3 CLAMP T/H OS 2 SECOND V3GND CLAMP ORDER LPF R 1M FB OS 1 OS 0 1M R FB V4 CLAMP T/H D A SECOND OUT V4GND CLAMP ORDER LPF SERIAL R FB 1M D B OUT 8:1 MUX PARALLEL/ R RD/SCLK 1M DIGITAL FB 18-BIT V5 CLAMP SERIAL FILTER SAR T/H CS SECOND INTERFACE V5GND CLAMP ORDER LPF R 1M FB PAR/SER SEL V 1M R DRIVE FB V6 CLAMP T/H SECOND PARALLEL DB 15:0 V6GND CLAMP ORDER LPF R 1M FB AD7608 1M R FB V7 CLAMP T/H SECOND V7GND CLAMP ORDER LPF R CLK OSC 1M FB 1M R FB BUSY CONTROL V8 CLAMP INPUTS T/H SECOND FRSTDATA V8GND CLAMP ORDER LPF R 1M FB AGND CONVST A CONVST B RESET RANGE Figure 1. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. 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Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 08938-001AD7608 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Analog Input ............................................................................... 19 Applications ....................................................................................... 1 ADC Transfer Function ............................................................. 20 Companion Products ....................................................................... 1 Internal/External Reference ...................................................... 21 Functional Block Diagram .............................................................. 1 Typical Connection Diagram ................................................... 22 Revision History ............................................................................... 2 Power-Down Modes .................................................................. 22 General Description ......................................................................... 3 Conversion Control ................................................................... 23 Specifications ..................................................................................... 4 Digital Interface .............................................................................. 24 Timing Specifications .................................................................. 6 Parallel Interface (PAR/SER SEL = 0) ...................................... 24 Absolute Maximum Ratings .......................................................... 10 Serial Interface (PAR/SER SEL = 1) ......................................... 25 Thermal Resistance .................................................................... 10 Reading During Conversion ..................................................... 25 ESD Caution ................................................................................ 10 Digital Filter ................................................................................ 26 Pin Configuration and Function Descriptions ........................... 11 Layout Guidelines....................................................................... 30 Typical Performance Characteristics ........................................... 14 Outline Dimensions ....................................................................... 32 Terminology .................................................................................... 18 Ordering Guide .......................................................................... 32 Theory of Operation ...................................................................... 19 Converter Details........................................................................ 19 REVISION HISTORY 8/2019Rev. B to Rev. C Changes to Patent Note, Note 1 ....................................................... 1 Change to Table 1 ............................................................................. 1 Change to tCONV Parameter, Table 3 ................................................. 6 Changes to Parallel/Serial Mode Parameter and Parallel/Read Changes to Ordering Guide .......................................................... 32 Operation Parameter, Table 3 ......................................................... 6 Changes to Track-and-Hold Amplifiers Section ........................ 20 1/2012Rev. 0 to Rev. A Changes to Ordering Guide .......................................................... 32 Changes to Analog Input Ranges Section ................................... 19 5/2018Rev. A to Rev. B 4/2011Revision 0: Initial Version Rev. C Page 2 of 32