18-Bit, 2.5 LSB INL, 800 kSPS, SAR ADC Data Sheet AD7674 FEATURES FUNCTIONAL BLOCK DIAGRAM PDBUF REF REFGND DVDD DGND 18-bit resolution with no missing codes AGND No pipeline delay (SAR architecture) OVDD AVDD AD7674 Differential input range: V (V up to 5 V) REF REF SERIAL OGND REFBUFIN PORT Throughput 18 800 kSPS (warp mode) IN+ SWITCHED D 17:0 CAP DAC IN 666 kSPS (normal mode) BUSY PARALLEL 570 kSPS (impulse mode) RD INTERFACE INL: 2.5 LSB max (9.5 ppm of full scale) CLOCK CS Dynamic range : 103 dB typ (V = 5 V) REF PD CONTROL LOGIC AND MODE0 CALIBRATION CIRCUITRY SINAD: 100 dB typ at 2 kHz (V = 5 V) REF RESET MODE1 Parallel (18-, 16-, or 8-bit bus) and serial 5 V/3 V interface SPI/QSPI/MICROWIRE/DSP compatible WARP IMPULSE CNVST 030830001 On-board reference buffer Single 5 V supply operation Figure 1. Power dissipation TM Table 1. PulSAR Selection 98 mW typ at 800 kSPS 100 kSPS to 500 kSPS to 800 kSPS to 78 mW typ at 500 kSPS (impulse mode) Type 250 kSPS 570 kSPS 1000 kSPS 160 W at 1 kSPS (impulse mode) Pseudo- AD7651, AD7650/AD7652, AD7653, 48-lead LQFP or 48-lead LFCSP Differential AD7660/ AD7664/AD7666 AD7667 Pin-to-pin compatible upgrade of AD7676, AD7678, AD7661 and AD7679 True Bipolar AD7663 AD7665 AD7671 True Differential AD7675 AD7676 AD7677 APPLICATIONS 18-Bit AD7678 AD7679 AD7674 CT scanners Multichannel/ AD7654, AD7655 High dynamic data acquisition Simultaneous Geophone and hydrophone sensors - replacement (low power, multichannel) PRODUCT HIGHLIGHTS Instrumentation 1. High Resolution, Fast Throughput. The AD7674 is an Spectrum analysis 800 kSPS, charge redistribution, 18-bit, SAR ADC (no Medical instruments latency). GENERAL DESCRIPTION 2. Excellent Accuracy. The AD7674 has a maximum integral The AD7674 is an 18-bit, 800 kSPS, charge redistribution, nonlinearity of 2.5 LSB with no missing 18-bit codes. successive approximation register (SAR) fully differential 3. Serial or Parallel Interface. Versatile parallel (18-, 16- or analog-to-digital converter (ADC) that operates on a single 5 V 8-bit bus) or 3-wire serial interface arrangement power supply. The device contains a high speed, 18-bit sampling compatible with both 3 V and 5 V logic. ADC, an internal conversion clock, an internal reference buffer, error correction circuits, and both serial and parallel system interface ports. The device is available in a 48-lead LQFP or a 48-lead LFCSP with operation specified from 40C to +85C. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20032016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. AD7674 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Converter Operation .................................................................. 16 Applications ....................................................................................... 1 Typical Connection Diagram ................................................... 17 General Description ......................................................................... 1 Power Dissipation versus Throughput .................................... 20 Functional Block Diagram .............................................................. 1 Conversion Control ................................................................... 20 Product Highlights ........................................................................... 1 Digital Interface .......................................................................... 20 Table of Contents .............................................................................. 2 Parallel Interface ......................................................................... 21 Revision History ............................................................................... 2 Serial Interface ............................................................................ 21 Specifications ..................................................................................... 3 Master Serial Interface ............................................................... 21 Timing Specifications .................................................................. 5 Slave Serial Interface .................................................................. 23 Absolute Maximum Ratings ............................................................ 7 Microprocessor Interfacing ....................................................... 24 ESD Caution .................................................................................. 7 Applications Information .............................................................. 25 Pin Configuration and Function Descriptions ............................. 8 Layout .......................................................................................... 25 Terminology .................................................................................... 11 Evaluating AD7674 Performance ............................................. 25 Typical Performance Characteristics ........................................... 12 Outline Dimensions ....................................................................... 26 Circuit Information ........................................................................ 16 Ordering Guide .......................................................................... 26 REVISION HISTORY 6/2016Rev. A to Rev. B Changed CP-48-1 to CP-48-4 and ADSP-219x to ADSP-2191M ................................................................. Throughout Changes to Figure 4 and Table 6 ..................................................... 8 Added Figure 5 Renumbered Sequentially .................................. 8 Changes to Serial Peripheral Interface (SPI) Section ................. 24 Updated Outline Dimensions ....................................................... 26 Changes to Ordering Guide .......................................................... 26 6/2009Rev. 0 to Rev. A Changes to Zero Error, TMIN to TMAX Parameter ........................... 3 Changes to Gain Error, TMIN to TMAX Parameter ........................... 3 Changes to Endnote 3 ...................................................................... 4 Changes to Pin Configuration Section .......................................... 8 Changes to Evaluating the AD7674s Performance Section ...... 25 Changes to Ordering Guide .......................................................... 26 7/2003Revision 0: Initial Version Rev. B Page 2 of 28