Evaluation Board for a AD7730L Transducer ADC EVAL-AD7730LEB FEATURES Interfacing to this board is provided either through a 36-Way Centronics Connector or through a 9-way D-type connector. Operates from a Single +5V Supply External sockets are provided for the analog inputs, an exter- nal reference input option and an external master clock On-Board Reference and Digital Buffers option. Various Linking Options OPERATING THE AD7730L EVALUATION BOARD Direct Hook-Up to Printer Port of PC POWER SUPPLIES PC Software for Control and Data Analysis The evaluation board has four power supply input pins: On-Board User Grid Area for Expansion AV , AGND, DV and DGND. The AD7730L is specified DD DD with an AV of +5V. Therefore, the AV voltage supplied DD DD to the board must be +5V. This AV voltage is also used to DD INTRODUCTION power the AD780 reference. To run the board from a single This Technical Note describes the evaluation board for the +5V supply, simply connect the AV and DV inputs DD DD AD7730L, Transducer ADC. The AD7730L is a complete ana- together. log front-end for weigh-scale and pressure measurement applica- Both AGND and DGND inputs are provided on the board. tions. The device accepts low-level signals directly from a trans- AGND connects to the AD7730L AGND pin and also connects ducer and outputs a serial digital word. The part features two to the GND pin of the AD780. DGND connects to the DGND buffered differential programmable gain analog inputs as well as pin of the AD7730L and to the GND of the digital chips on the a differential reference input. An on-chip 6-bit DAC allows the board. The AGND and DGND planes are connected at the removal of TARE voltages. Clock signals for synchronizing ac AD7730L. Therefore, it is recommended not to connect AGND excitation of the bridge are also provided. Full data on the and DGND elsewhere in the system to avoid ground loop prob- AD7730L is available in the AD7730 data sheet available from lems. When using a single supply for both AV and DV , only Analog Devices and should be consulted in conjunction with this DD DD one ground connection should be made to the board. This Technical Note when using the Evaluation Board. connection should be made to the board s AGND input terminal. Included on the evaluation board, along with the AD7730L, are Both supplies are decoupled to their respective ground plane with an AD780, a +2.5 V ultra high precision bandgap reference, a 10F tantalum and 0.1F ceramic disc capacitors. 2.4576MHz crystal and digital buffers to buffer signals to and from the edge connectors. FUNCTIONAL BLOCK DIAGRAM AV AGND DV DGND DD DD 9-WAY D-TYPE CONNECTOR AIN1(+) AIN1(-) 36-WAY AD7730 AIN2(+)/D1 BUFFERS CENTRONICS ADC CONNECTOR AIN2(-)/D0 ACX A CX AD780 AV DD REFERENCE REF IN MCLK IN REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A. its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 617/329-4700 Fax: 617/326-8703EVAL-AD7730LEB Link Options There are a number of link options on the evaluation board which should be set for the required operating setup before using the board. The functions of these link options are described in detail below. Link No. Function LK1 This option selects the master clock option for the AD7730L. The master clock source comes from the on-board crystal or from an external clock source via SKT11. This is a double link and both links must be moved together for correct operation. With both links in position A, the external clock option is selected and an externally applied clock to SKT 11 is routed to the MCLK IN pin of the AD7730L. With both links in position B, the on-board crystal is selected and provides the master clock for the AD7730L. LK2 This link option is used to determine whether the AD7730L is in its normal operating mode or its STANDBY (power-down) mode. With this link in position A, the STANDBY input of the AD7730L is connected to a logic high thus configuring the part for normal operation. With this link in position B, the STANDBY input of the AD7730L is connected to a logic low and the AD7730L is placed in its power-down mode where its power dissipation is typically 100W. LK3 This link option is used to select the reference source for the AD7730L s REF IN(-) input. With this link in position A, the REF IN(-) pin of the AD7730L is connected to SKT10. An external voltage connected to SKT10 can now be used for REF IN(-). With this link in position B, the REF IN(-) pin of the AD7730L is connected directly to AGND. LK4 This link controls the polarity of the serial clock. With this link in position A, the POL pin of the AD7730L is connected to a logic high. With this input high, the first transition of the serial clock in a data transfer is from a high to a low. This link should be in position A when operating with the evaluation board software. With this link in position B, the POL pin of the AD7730L is connected to a logic low. With this input low, the first transition of the serial clock in a data transfer is from a low to a high. LK5 This link option is used to select the reference source for the AD7730L s REF IN(+) input. With this link in position A, the REF IN (+) pin of the AD7730L is connected directly to the output of the on-board reference, the AD780. With this link in position B, the REF IN (+) pin of the AD7730L is connected directly to AV . DD With this link in position C, the REF IN(+) pin of the AD7730L is connected to SKT9. An external voltage connected to SKT9 can now be used for REF IN(+). LK6 This link is in series with the ACX pin. With this link in place, SKT5 provides the ACX signal from the AD7730L. LK7 This link is in series with the ACX pin. With this link in place, SKT6 provides the ACX signal from the AD7730L. LK8 This link is in series with the AIN2(+)/D1 pin. With this link in place, SKT8 is connected directly to the AIN2(+)/D1 pin. This link may be removed so that an analog input signal at SKT8 can be connected to the component grid for signal conditioning before being applied to the AIN2(+) input of the AD7730L. LK9 This link is in series with the AIN2(-)/D0 pin. With this link in place, SKT7 is connected directly to the AIN2(-)/D0 pin. This link may be removed so that an analog input signal at SKT7 can be connected to the component grid for signal conditioning before being applied to the AIN2(-) input of the AD7730L. LK10 This link is in series with the AIN1(+) analog input. With this link in place, the analog input on the SKT3 input is connected directly to the AIN1(+) input on the part. This link may be removed so that the input signal at SKT3 can be connected to the component grid for signal conditioning before being applied to the AIN1(+) input of the AD7730L. 2 REV. B