2-Channel, 10 V Input Range, High Throughput, 24-Bit - ADC AD7732 FEATURES FUNCTIONAL BLOCK DIAGRAM High resolution ADC REFIN() REFIN(+) 24 bits no missing codes AIN0(+) REFERENCE 0.0015% nonlinearity DETECT Optimized for fast channel switching BUFFER 18-bit p-p resolution (21 bits effective) at 500 Hz 16-bit p-p resolution (19 bits effective) at 2 kHz 24-BIT AIN0() ADC 14-bit p-p resolution (18 bits effective) at 15 kHz On-chip per channel system calibration MUX 2 fully differential analog inputs AD7732 Input ranges +5 V, 5 V, +10 V, 10 V AIN1(+) Overvoltage tolerant CS Up to 16.5 V not affecting adjacent channel SCLK CALIBRATION SERIAL AIN1() Up to 50 V absolute maximum CIRCUITRY INTERFACE DIN 3-wire serial interface DOUT SPI, QSPI, MICROWIRE, and DSP compatible Schmitt trigger on logic inputs P0 RESET CLOCK CONTROL I/O PORT Single-supply operation GENERATOR LOGIC SYNC/P1 RDY 5 V analog supply 3 V or 5 V digital supply AGND AV MCLKOUT MCLKIN DGND DV DD DD Package: 28-lead TSSOP Figure 1. APPLICATIONS The differential reference input features No-Reference detect PLCs/DCS capability. The ADC also supports per channel system Multiplexing applications calibration options. The digital serial interface can be Process control configured for 3-wire operation and is compatible with Industrial instrumentation microcontrollers and digital signal processors. All interface inputs are Schmitt triggered. GENERAL DESCRIPTION The part is specified for operation over the extended industrial The AD7732 is a high precision, high throughput analog front temperature range of 40C to +105C. end. True 16-bit p-p resolution is achievable with a total conversion time of 500 s (2 kHz channel switching), making it Other parts in the AD7732 family are the AD7734 and ideally suitable for high resolution multiplexing applications. the AD7738. The part can be configured via a simple digital interface, which The AD7734 is similar to AD7732, but its analog front end allows users to balance the noise performance against data features four single-ended input channels. throughput up to a 15.4 kHz. The AD7738 analog front end is configurable for four fully The analog front end features two fully differential input differential or eight single-ended input channels, features channels with unipolar or true bipolar input ranges to 10 V 0.625 V to 2.5 V bipolar/unipolar input ranges, and accepts a while operating from a single +5 V analog supply. The part has common-mode input voltage from 200 mV to AVDD 300 mV. an overrange and underrange detection capability and accepts The AD7738 multiplexer output is pinned out externally, an analog input overvoltage to 16.5 V without degrading the allowing the user to implement programmable gain or signal performance of the adjacent channels. conditioning before being applied to the ADC. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 20032011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. AD7732 TABLE OF CONTENTS AD7732Specifications.................................................................. 3 Digital Interface Description ........................................................ 22 Timing Specifications....................................................................... 6 Hardware ..................................................................................... 22 Absolute Maximum Ratings............................................................ 8 Reset ............................................................................................. 23 Typical Performance Characteristics ............................................. 9 Access the AD7732 Registers.................................................... 23 Output Noise and Resolution Specification................................ 10 Single Conversion and Reading Data...................................... 23 Chopping Enabled...................................................................... 10 Dump Mode................................................................................ 24 Chopping Disabled..................................................................... 11 Continuous Conversion Mode ................................................. 24 Pin Configurations and Functional Descriptions ...................... 12 Continuous Read (Continuous Conversion) Mode .............. 25 Register Description....................................................................... 14 Circuit Description......................................................................... 26 Register Access............................................................................ 15 Analog Front End....................................................................... 26 Communications Register......................................................... 15 Analog Inputs Extended Voltage Range ................................. 27 I/O Port Register......................................................................... 16 Chopping..................................................................................... 27 Revision Register ........................................................................ 16 Multiplexer, Conversion, and Data Output Timing ............. 28 Test Register ................................................................................ 16 Sigma-Delta ADC ...................................................................... 28 ADC Status Register................................................................... 17 Frequency Response .................................................................. 28 Checksum Register..................................................................... 17 Voltage Reference Inputs........................................................... 29 ADC Zero-Scale Calibration Register ..................................... 17 Reference Detect......................................................................... 29 ADC Full-Scale Register............................................................ 17 I/O Port........................................................................................ 30 Channel Data Registers.............................................................. 17 Calibration................................................................................... 30 Channel Zero-Scale Calibration Registers .............................. 18 ADC Zero-Scale Self-Calibration ............................................ 30 Channel Full-Scale Calibration Registers................................ 18 Per Channel System Calibration .............................................. 30 Channel Status Registers ........................................................... 18 High Common-Mode Voltage Application ............................ 31 Channel Setup Registers ............................................................ 19 Outline Dimensions ....................................................................... 32 Channel Conversion Time Registers ....................................... 19 Ordering Guide .......................................................................... 32 Mode Register ............................................................................. 20 REVISION HISTORY 6/11Rev. 0 to Rev. A Changes to Figure 22...................................................................... 25 Changes to ADC Performance Chopping Enabled, Offset Error Changes to Ordering Guide .......................................................... 32 (Unipolar, Bipolar) Parameter, Offset Drift vs. Temperature Parameter, Positive Full-Scale Drift vs. Temp. Parameter, and 2/03Revision 0: Initial Version Channel-to-Channel Isolation Parameter in Table 1................... 3 Change to ADC Performance Chopping Disabled, Channel-to- Channel Isolation Parameter in Table 1 ........................................ 3 Rev. A Page 2 of 32