8-Channel, High Throughput, 24-Bit Sigma-Delta ADC Data Sheet AD7739 FEATURES FUNCTIONAL BLOCK DIAGRAM REFIN() REFIN(+) High resolution ADC 24 bits, no missing codes REFERENCE DETECT AIN0 0.0015% nonlinearity Optimized for fast channel switching AIN1 BUFFER 18-bit p-p resolution (21 bits effective) at 500 Hz AIN2 24-BIT 16-bit p-p resolution (19 bits effective) at 4 kHz AIN3 - ADC On-chip per channel system calibration MUX AIN4 Configurable inputs AIN5 8 single-ended or 4 fully differential DV DD AD7739 Input ranges AIN6 +625 mV, 625 mV, +1.25 V, 1.25 V, +2.5 V, 2.5 V AIN7 CS 3-wire serial interface SCLK CALIBRATION SERIAL SPI, QSPI, MICROWIRE, and DSP compatible AINCOM/P0 CIRCUITRY INTERFACE DOUT Schmitt trigger on logic inputs DIN AV DD Single-supply operation 5 V analog supply RESET CLOCK CONTROL I/O PORT 3 V or 5 V digital supply GENERATOR LOGIC SYNC/P1 RDY Package: 24-lead TSSOP APPLICATIONS AGND AV MCLKOUT MCLKIN DGND DV DD DD 03742-0-012 PLCs/DCSs Figure 1. Multiplexing applications Process control Industrial instrumentation GENERAL DESCRIPTION The AD7739 is a high precision, high throughput analog front The part is specified for operation over the extended industrial end. True 16-bit p-p resolution is achievable with a total temperature range of 40C to +105C. conversion time of 250 s (4 kHz channel switching), making it Other parts in the AD7739 family are the AD7738, AD7734, ideally suited to high resolution multiplexing applications. and AD7732. The part can be configured via a simple digital interface, which The AD7738 is similar to the AD7739 but has higher speed allows users to balance the noise performance against data (8.5 kHz channel switching for 16-bit performance) and higher throughput up to 15 kHz. AIN leakage current. The AD7738 multiplexer output is pinned out externally, allowing the user to implement programmable The analog front end features eight single-ended or four fully differential input channels with unipolar or bipolar 625 mV, gain or signal conditioning before being applied to the ADC. 1.25 V, and 2.5 V input ranges. It accepts a common-mode The AD7734 analog front end features four single-ended input input voltage from 200 mV above AGND to AVDD 300 mV. channels with unipolar or true bipolar input ranges to 10 V The differential reference input features no-reference detect while operating from a single +5 V analog supply. The AD7734 capability. The ADC also supports per channel system accepts an analog input overvoltage to 16.5 V without calibration options. degrading the performance of the adjacent channels. The digital serial interface can be configured for 3-wire The AD7732 is similar to the AD7734, but its analog front end features two fully differential input channels. operation and is compatible with microcontrollers and digital signal processors. All interface inputs are Schmitt triggered. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20032013 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. AD7739 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Channel Full-Scale Calibration Registers ............................... 16 Applications ....................................................................................... 1 Channel Status Registers ........................................................... 17 Functional Block Diagram .............................................................. 1 Channel Setup Registers ............................................................ 18 General Description ......................................................................... 1 Channel Conversion Time Registers ....................................... 19 Revision History ............................................................................... 2 Mode Register ............................................................................. 19 Specifications ..................................................................................... 3 Digital Interface Description ........................................................ 21 Timing Specifications .................................................................. 5 Hardware ..................................................................................... 21 Timing Diagrams .......................................................................... 6 Reset ............................................................................................. 22 Absolute Maximum Ratings ............................................................ 7 Access the AD7739 Registers .................................................... 22 ESD Caution .................................................................................. 7 Single Conversion and Reading Data ...................................... 22 Pin Configuration and Function Descriptions ............................. 8 Dump Mode ................................................................................ 22 Typical Performance Characteristics ........................................... 10 Continuous Conversion Mode ................................................. 23 Output Noise and Resolution Specification ................................ 11 Continuous Read (Continuous Conversion) Mode .............. 24 Chopping Enabled ...................................................................... 11 Circuit Description......................................................................... 25 Chopping Disabled ..................................................................... 12 Analog Inputs.............................................................................. 25 Register Descriptions ..................................................................... 13 Sigma-Delta ADC ...................................................................... 25 Register Access ............................................................................ 14 Chopping ..................................................................................... 25 Communications Register ......................................................... 14 Multiplexer, Conversion, and Data Output Timing .............. 26 I/O Port Register ......................................................................... 15 Frequency Response .................................................................. 27 Revision Register ........................................................................ 15 Extended Voltage Range of the Analog Input ........................ 27 Test Register ................................................................................ 15 Voltage Reference Inputs ........................................................... 28 ADC Status Register ................................................................... 15 Reference Detect ......................................................................... 28 Checksum Register ..................................................................... 16 I/O Port ........................................................................................ 28 ADC Zero-Scale Calibration Register ..................................... 16 Calibration................................................................................... 28 ADC Full-Scale Calibration Register ....................................... 16 Outline Dimensions ....................................................................... 30 Channel Data Registers.............................................................. 16 Ordering Guide .......................................................................... 30 Channel Zero-Scale Calibration Registers .............................. 16 REVISION HISTORY 8/13Rev. 0 to Rev. A Updated Format .................................................................. Universal Changes to Figure 1 .......................................................................... 1 Change to ADC Performance Chopping Enabled, Integral Nonlinearity Parameter, Table 1 ..................................................... 3 Change to Table 3 ............................................................................. 7 Deleted Figure 12, Renumbered Sequentially .............................. 8 Changes to Revision Register Section .......................................... 15 Change to Voltage Reference Inputs Section .............................. 28 Updated Outline Dimensions ....................................................... 30 Changes to Ordering Guide .......................................................... 30 5/03Revision 0: Initial Version Rev. A Page 2 of 32