24-Bit, 625 kSPS, 109 dB Sigma-Delta ADC with On-Chip Buffers, Serial Interface Data Sheet AD7763 FEATURES FUNCTIONAL BLOCK DIAGRAM V V 120 dB dynamic range at 78 kHz output data rate IN IN+ 109 dB dynamic range at 625 kHz output data rate MULTIBIT 112 dB SNR at 78 kHz output data rate AV DIFF - DD1 MODULATOR 107 dB SNR at 625 kHz output data rate AV DD2 AV 625 kHz maximum fully filtered output word rate DD3 V REF+ RECONSTRUCTION BUF AV DD4 Programmable oversampling rate (32 to 256) REFGND DECAPA Flexible serial interface DECAPB Fully differential modulator input AD7763 PROGRAMMABLE R BIAS DECIMATION On-chip differential amplifier for signal buffering AGND MCLK Low-pass finite impulse response (FIR) filter with default MCLKGND V DRIVE CONTROL LOGIC or user-programmable coefficients SYNC I/O DV DD RESET FIR FILTER OFFSET AND GAIN Overrange alert bit SH2:0 DGND REGISTERS ENGINE ADR2:0 Digital offset and gain correction registers CDIV Low power and power-down modes SYNC Synchronization of multiple devices via pin 2 I S interface mode Figure 1. APPLICATIONS Data acquisition systems Vibration analysis Instrumentation GENERAL DESCRIPTION The differential input is sampled at up to 40 MSPS by an analog modulator. The modulator output is processed by a series of The AD7763 high performance, 24-bit, - analog-to-digital low-pass filters, the final filter having default or user-programmable converter (ADC) combines wide input bandwidth and high coefficients. The sample rate, filter corner frequencies, and speed with the benefits of - conversion, as well as performance output word rate are set by a combination of the external clock of 107 dB SNR at 625 kSPS, making it ideal for high speed data frequency and the configuration registers of the AD7763. acquisition. A wide dynamic range, combined with significantly The reference voltage supplied to the AD7763 determines the reduced antialiasing requirements, simplifies the design process. analog input range. With a 4 V reference, the analog input range An integrated buffer to drive the reference, a differential ampli- is 3.2 V differential-biased around a common mode of 2 V. fier for signal buffering and level shifting, an overrange flag, This common-mode biasing can be achieved using the on-chip internal gain and offset registers, and a low-pass, digital FIR differential amplifiers, further reducing the external signal filter make the AD7763 a compact, highly integrated data conditioning requirements. acquisition device requiring minimal peripheral component selection. In addition, the device offers programmable The AD7763 is available in an exposed paddle, 64-lead TQFP EP decimation rates and a digital FIR filter, which can be user- and is specified over the industrial temperature range from programmed to ensure that its characteristics are tailored for the 40C to +85C. users application. The AD7763 is ideal for applications demanding Table 1. Related Devices high SNR without necessitating the design of complex, front- end signal processing. Part No. Description AD7760 24-bit, 2.5 MSPS, 100 dB -, parallel interface AD7762 24-bit, 625 kSPS, 109 dB -, parallel interface Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20052014 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 2 I S SCP SCR SDL DRDY SCO FSO SDO SDI FSI 05476-001AD7763 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Example 2 .................................................................................... 19 Applications ....................................................................................... 1 Driving the AD7763 ....................................................................... 20 Functional Block Diagram .............................................................. 1 Using the AD7763 ...................................................................... 21 General Description ......................................................................... 1 Bias Resistor Selection ............................................................... 21 Revision History ............................................................................... 2 Decoupling and Layout Recommendations................................ 22 Specifications ..................................................................................... 3 Supply Decoupling ..................................................................... 23 Timing Specifications ....................................................................... 5 Additional Decoupling .............................................................. 23 Timing Diagrams .......................................................................... 6 Reference Voltage Filtering ....................................................... 23 Absolute Maximum Ratings ............................................................ 7 Differential Amplifier Components ........................................ 23 ESD Caution .................................................................................. 7 Exposed Paddle ........................................................................... 23 Pin Configuration and Function Descriptions ............................. 8 Layout Considerations ............................................................... 23 Terminology .................................................................................... 10 Programmable FIR Filter ............................................................... 24 Typical Performance Characteristics ........................................... 11 Downloading a User-Defined Filter ............................................ 25 Theory of Operation ...................................................................... 14 Example Filter Download ......................................................... 26 AD7763 Interface ............................................................................ 15 Registers ........................................................................................... 27 Reading Data Using the SPI Interface ..................................... 15 Control Register 1Address 0x001 ......................................... 27 Synchronization .......................................................................... 15 Control Register 2Address 0x002 ......................................... 27 Sharing the Serial Bus ................................................................ 15 Status Register (Read Only) ...................................................... 28 Writing to the AD7763 .............................................................. 16 Offset RegisterAddress 0x003 ............................................... 28 Reading Status and Other Registers ......................................... 17 Gain RegisterAddress 0x004 ................................................. 28 2 Reading Data Using the I S Interface ....................................... 18 Overrange RegisterAddress 0x005 ....................................... 28 Clocking the AD7763 ..................................................................... 19 Outline Dimensions ....................................................................... 29 Example 1 .................................................................................... 19 Ordering Guide .......................................................................... 29 REVISION HISTORY 1/14Rev. A to Rev. B 11/09Rev. 0 to Rev. A Added Exposed Pad Notation, Figure 4 and Table 5 ................... 8 Changes to Figure 5 ........................................................................... 8 Change to Figure 37 ....................................................................... 24 Changes to Sharing the Serial Bus Section ................................. 15 Updated Outline Dimensions ....................................................... 29 Changes to Figure 26 ...................................................................... 16 Updated Outline Dimensions ....................................................... 29 Changes to Ordering Guide .......................................................... 29 10/05Revision 0: Initial Version Rev. B Page 2 of 32