24-Bit, 156 kSPS, 112 dB Sigma-Delta ADC with On-Chip Buffers and Serial Interface Data Sheet AD7765 FEATURES FUNCTIONAL BLOCK DIAGRAM V A V A+ V + V MCLK GND OUT OUT IN IN High performance 24-bit - ADC 115 dB dynamic range at 78.125 kHz output data rate AV 1 DD V A+ IN AV 2 DIFF DD 112 dB dynamic range at 156 kHz output data rate MULTIBIT V A AV 3 IN - DD MODULATOR 156 kHz maximum fully filtered output word rate AV 4 DD DV DD Pin-selectable oversampling rates of 128 and 256 V + REF BUF Low power mode OVERRANGE RECONSTRUCTION Flexible serial peripheral interface (SPI) REFGND DECIMATION DEC RATE Fully differential modulator input SYNC INTERFACE LOGIC AND OFFSET AND GAIN FIR FILTER ENGINE On-chip differential amplifier for signal buffering CORRECTION REGISTERS R BIAS RESET/PWRDWN On-chip reference buffer AD7765 Full band low-pass finite impulse response (FIR) filter FSO SCO SDI SDO FSI Overrange alert pin Figure 1. Digital gain correction registers Power-down mode Table 1. Related Devices Synchronization of multiple devices via the SYNC pin Device No. Description Daisy chaining AD7760 2.5 MSPS, 100 dB, parallel output, on-chip buffer AD7762 625 kSPS, 109 dB, parallel output, on-chip buffer APPLICATIONS AD7763 625 kSPS, 109 dB, serial output, on-chip buffers Data acquisition systems AD7765 312 kSPS, 109 dB, serial output, on-chip buffers Vibration analysis AD7766 128 kSPS/64 kSPS/32 kSPS, 8.5 mW, 109 dB SNR Instrumentation AD7767 128 kSPS/64 kSPS/32 kSPS, 8.5 mW, 109 dB SNR GENERAL DESCRIPTION The AD7765 is a high performance, 24-bit sigma-delta (-) The differential input is sampled at up to 40 MSPS by an analog analog-to-digital converter (ADC). It combines wide input modulator. The modulator output is processed by a series of bandwidth, high speed, and performance of 112 dB dynamic low-pass filters. The external clock frequency applied to the range at a 156 kHz output data rate. With excellent dc speci- AD7765 determines the sample rate, filter corner frequencies, and output word rate. fications, the converter is ideal for high speed data acquisition of ac signals where dc data is also required. The AD7765 device boasts a full band on-board FIR filter. The Using the AD7765 eases front-end antialias filtering require- full stop-band attenuation of the filter is achieved at the Nyquist ments, simplifying the design process significantly. The AD7765 frequency. This feature offers increased protection from signals offers pin-selectable decimation rates of 128 and 256. Other that lie above the Nyquist frequency being aliased back into the features include an integrated buffer to drive the reference, as input signal bandwidth. well as a fully differential amplifier to buffer and level shift the The reference voltage supplied to the AD7765 determines the input to the modulator. input range. With a 4 V reference, the analog input range is An overrange alert pin indicates when an input signal exceeds 3.2768 V differential, biased around a common mode of 2.048 V. the acceptable range. The addition of internal gain and internal This common-mode biasing is achieved using the on-chip overrange registers makes the AD7765 a compact, highly integrated differential amplifier, further reducing the external signal data acquisition device requiring minimal peripheral components. conditioning requirements. The AD7765 also offers a low power mode, significantly The AD7765 is available in a 28-lead TSSOP package and is reducing power dissipation without reducing the output data specified over the industrial temperature range of 40C to +85C. rate or available input bandwidth. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20072018 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 06519-001AD7765 Data Sheet TABLE OF CONTENTS Synchronization .......................................................................... 24 Features .............................................................................................. 1 Overrange Alerts ........................................................................ 24 Applications ....................................................................................... 1 Power Modes ............................................................................... 25 Functional Block Diagram .............................................................. 1 Decimation Rate Pin .................................................................. 25 General Description ......................................................................... 1 Daisy Chaining ............................................................................... 26 Revision History ............................................................................... 2 Reading Data in Daisy-Chain Mode ....................................... 26 Specifications ..................................................................................... 4 Writing Data in Daisy-Chain Mode ........................................ 27 Timing Specifications .................................................................. 7 Clocking the AD7765 .................................................................... 28 Absolute Maximum Ratings ............................................................ 9 MCLK Jitter Requirements ....................................................... 28 ESD Caution .................................................................................. 9 Decoupling and Layout Information ........................................... 29 Pin Configuration and Function Descriptions ........................... 10 Supply Decoupling ..................................................................... 29 Typical Performance Characteristics ........................................... 12 Reference Voltage Filtering ....................................................... 29 Terminology .................................................................................... 15 Differential Amplifier Components ........................................ 29 Theory of Operation ...................................................................... 16 Layout Considerations ............................................................... 29 - Modulation and Digital Filtering ..................................... 16 Using the AD7765 ...................................................................... 30 AD7765 Antialias Protection .................................................... 19 Bias Resistor Selection ............................................................... 30 AD7765 Input Structure ................................................................ 20 AD7765 Registers ........................................................................... 31 On-Chip Differential Amplifier ............................................... 21 Control Register ......................................................................... 31 Modulator Input Structure ........................................................ 22 Status Register ............................................................................. 31 Driving the Modulator Inputs Directly ................................... 22 Gain RegisterAddress 0x0004 ............................................... 32 AD7765 Serial Interface ................................................................. 23 Overrange RegisterAddress 0x0005 ..................................... 32 Reading Data ............................................................................... 23 Outline Dimensions ....................................................................... 33 Reading Status and Other Registers ......................................... 23 Ordering Guide .......................................................................... 33 Writing to the AD7765 .............................................................. 23 Functionality ................................................................................... 24 REVISION HISTORY 6/2018Rev. B to Rev. C Added Figure 27 Renumbered Sequentially .............................. 16 Change to Table 13 ......................................................................... 23 Added Table 8 and Table 9 ............................................................ 17 Changes to On-Chip Differential Amplifier Section and 1/2018Rev. A to Rev. B Table 10 ............................................................................................ 20 Change to Features Section ............................................................. 1 Changes to AD7765 Serial Interface Section Title, Reading Changes to Table 2 ............................................................................ 3 Data Section, Table 12, and Table 13 Title .................................. 22 Changes to Table 3 ............................................................................ 6 Changes to Overrange Alerts Section .......................................... 23 Changes to Figure 3 Caption and Figure 4 Caption..................... 7 Changes to Table 14 ....................................................................... 24 Changes to Table 4 ............................................................................ 8 Changes Daisy Chaining Section and Table 15 .......................... 25 Changes to Table 5 ............................................................................ 9 Changes to MCLK Jitter Requirements Section ......................... 27 Changes to Terminology Section.................................................. 14 Changes to Layout Considerations Section and Added Table 6 Renumbered Sequentially .................................. 15 Figure 48 Caption ........................................................................... 28 Changes to - Modulation and Digital Filtering Section ....... 15 Changes to Table 17 Endnote 2, Table 18, and Table 19 ............ 30 Changes to Ordering Guide .......................................................... 32 Rev. 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