SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs ADAU1401A FEATURES GENERAL DESCRIPTION 28-/56-bit, 50 MIPS digital audio processor The ADAU1401A is a complete, single-chip audio system with 2 ADCs: SNR of 100 dB, THD + N of 83 dB 28-/56-bit audio DSP, ADCs, DACs, and microcontroller-like 4 DACs: SNR of 104 dB, THD + N of 90 dB control interfaces. Signal processing includes equalization, cross- Complete standalone operation over, bass enhancement, multiband dynamics processing, delay Self-boot from serial EEPROM compensation, speaker compensation, and stereo image widening. Auxiliary ADC with 4-input mux for analog control This processing can be used to compensate for real-world limita- GPIOs for digital controls and outputs tions of speakers, amplifiers, and listening environments, providing Fully programmable with SigmaStudio graphical tool dramatic improvements in perceived audio quality. 28-bit 28-bit multiplier with 56-bit accumulator for full The signal processing of the ADAU1401A is comparable to that double-precision processing found in high end studio equipment. Most processing is done in Clock oscillator for generating master clock from crystal full 56-bit, double-precision mode, resulting in very good low PLL for generating master clock from 64 f , 256 f , S S level signal performance. The ADAU1401A is a fully program- 384 f , or 512 f clocks S S mable DSP. The easy to use SigmaStudio software allows the 2 Flexible serial data input/output ports with I S-compatible, user to graphically configure a custom signal processing flow left-justified, right-justified, and TDM modes using blocks such as biquad filters, dynamics processors, level Sampling rates of up to 192 kHz supported controls, and GPIO interface controls. On-chip voltage regulator for compatibility with 3.3 V systems The ADAU1401A programs can be loaded on power-up either 48-lead, plastic LQFP from a serial EEPROM through its own self-boot mechanism or Qualified for automotive applications from an external microcontroller. On power-down, the current APPLICATIONS state of the parameters can be written back to the EEPROM from Multimedia speaker systems the ADAU1401A to be recalled the next time the program is run. MP3 player speaker docks Two - ADCs and four - DACs provide a 98.5 dB analog Automotive head units input to analog output dynamic. Each ADC has a THD + N of Minicomponent stereos 83 dB, and each DAC has a THD + N of 90 dB. Digital input Digital televisions and output ports allow a glueless connection to additional ADCs Studio monitors 2 and DACs. The ADAU1401A communicates through an I C bus Speaker crossovers or a 4-wire SPI port. Musical instrument effects processors In-seat sound systems (aircraft/motor coaches) FUNCTIONAL BLOCK DIAGRAM DIGITAL VDD DIGITAL GROUND ANALOG VDD ANALOG PLL LOOP CRYSTAL PLL MODE GROUND FILTER 3.3V 3 3 3 2 3 2 PLL CLOCK OSCILLATOR 1.8V ADAU1401A REGULATOR FILTD/CM 2 2-CHANNEL STEREO ANALOG ADC INPUT DAC 4-CHANNEL ANALOG 28-/56-BIT, 50MIPS FILTA/ OUTPUT AUDIO PROCESSOR CORE, 40ms DELAY MEMORY ADC RES 2 DAC CONTROL INTERFACE 8-CHANNEL 8-BIT AUX 8-CHANNEL RESET/ GPIO AND SELF-BOOT DIGITAL INPUT ADC DIGITAL OUTPUT MODE SELECT INPUT/OUTPUT MATRIX 5 3 3 3 2 RESET SELF-BOOT I C/SPI AND WRITEBACK DIGITAL IN OR GPIO AUX ADC OR GPIO DIGITAL OUT OR GPIO Figure 1. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 08506-001ADAU1401A TABLE OF CONTENTS Features .............................................................................................. 1 Address Maps.............................................................................. 30 Applications....................................................................................... 1 Parameter RAM.......................................................................... 30 General Description ......................................................................... 1 Data RAM ................................................................................... 30 Functional Block Diagram .............................................................. 1 Read/Write Data Formats ......................................................... 30 Revision History ............................................................................... 3 Control Register Map..................................................................... 32 Specifications..................................................................................... 4 Control Register Details ................................................................ 34 Analog Performance .................................................................... 4 Address 2048 to Address 2055 (0x0800 to 0x0807)Interface Registers....................................................................................... 34 Digital Input/Output.................................................................... 5 Address 2056 (0x0808)GPIO Pin Setting Register ............ 35 Power.............................................................................................. 6 Address 2057 to Address 2060 (0x0809 to 0x080C) Temperature Range ...................................................................... 6 Auxiliary ADC Data Registers.................................................. 36 PLL and Oscillator........................................................................ 6 Address 2064 to Address 2068 (0x0810 to 0x0814)Safeload Regulator........................................................................................ 6 Data Registers ............................................................................. 37 Digital Timing Specifications ..................................................... 7 Address 2069 to Address 2073 (0x0815 to 0x0819)Safeload Absolute Maximum Ratings.......................................................... 10 Address Registers ....................................................................... 37 Thermal Resistance .................................................................... 10 Address 2074 and Address 2075 (0x081A and 0x081B)Data Capture Registers........................................................................ 38 ESD Caution................................................................................ 10 Address 2076 (0x081C)DSP Core Control Register.......... 39 Pin Configuration and Function Descriptions........................... 11 Address 2078 (0x081E)Serial Output Control Register .... 40 Typical Performance Characteristics ........................................... 14 Address 2079 (0x081F)Serial Input Control Register ....... 41 System Block Diagram................................................................... 15 Address 2080 and Address 2081 (0x0820 and 0x0821) Theory of Operation ...................................................................... 16 Multipurpose Pin Configuration Registers............................. 42 Initialization .................................................................................... 17 Address 2082 (0x0822)Auxiliary ADC and Power Control Power-Up Sequence ................................................................... 17 Register ........................................................................................ 43 Control Registers Setup ............................................................. 17 Address 2084 (0x0824)Auxiliary ADC Enable Register ... 43 Recommended Program/Parameter Loading Procedure ..... 17 Address 2086 (0x0826)Oscillator Power-Down Register . 43 Power Reduction Modes............................................................ 17 Address 2087 (0x0827)DAC Setup Register ....................... 43 Using the Oscillator.................................................................... 18 Multipurpose Pins .......................................................................... 44 Setting Master Clock/PLL Mode.............................................. 18 Auxiliary ADC............................................................................ 44 Voltage Regulator ....................................................................... 19 General-Purpose Input/Output Pins....................................... 44 Audio ADCs .................................................................................... 20 Serial Data Input/Output Ports ................................................ 44 Audio DACs .................................................................................... 21 Layout Recommendations............................................................. 47 Control Ports................................................................................... 22 Parts Placement .......................................................................... 47 2 I C Port ........................................................................................ 23 Grounding ................................................................................... 47 SPI Port ........................................................................................ 26 Typical Application Schematics.................................................... 48 Self-Boot ...................................................................................... 27 Self-Boot Mode........................................................................... 48 Signal Processing ............................................................................ 29 2 I C Control .................................................................................. 49 Numeric Formats........................................................................ 29 SPI Control.................................................................................. 50 Programming .............................................................................. 29 Outline Dimensions....................................................................... 51 RAMs and Registers ....................................................................... 30 Ordering Guide .......................................................................... 51 Rev. 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