SigmaDSP Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL Data Sheet ADAU1761 FEATURES GENERAL DESCRIPTION SigmaDSP 28-/56-bit, 50 MIPS digital audio processor The ADAU1761 is a low power, stereo audio codec with Fully programmable with SigmaStudio graphical tool integrated digital audio processing that supports stereo 48 kHz 24-bit stereo audio ADC and DAC: >98 dB SNR record and playback at 14 mW from a 1.8 V analog supply. The Sampling rates from 8 kHz to 96 kHz stereo audio ADCs and DACs support sample rates from 8 kHz Low power: 7 mW record, 7 mW playback, 48 kHz at 1.8 V to 96 kHz as well as a digital volume control. 6 analog input pins, configurable for single-ended or The SigmaDSP core features 28-bit processing (56-bit double differential inputs precision). The processor allows system designers to compensate Flexible analog input/output mixers for the real-world limitations of microphones, speakers, amplifiers, Stereo digital microphone input and listening environments, resulting in a dramatic improvement Analog outputs: 2 differential stereo, 2 single-ended stereo, in the perceived audio quality through equalization, multiband 1 mono headphone output driver compression, limiting, and third-party branded algorithms. PLL supporting input clocks from 8 MHz to 27 MHz The SigmaStudio graphical development tool is used to program Analog automatic level control (ALC) the ADAU1761. This software includes audio processing blocks Microphone bias reference voltage such as filters, dynamics processors, mixers, and low level DSP Analog and digital I/O: 1.8 V to 3.65 V 2 functions for fast development of custom signal flows. I C and SPI control interfaces Digital audio serial data I/O: stereo and time-division The record path includes an integrated microphone bias circuit multiplexing (TDM) modes and six inputs. The inputs can be mixed and muxed before the Software-controllable clickless mute ADC, or they can be configured to bypass the ADC. The Software power-down ADAU1761 includes a stereo digital microphone input. GPIO pins for digital controls and outputs The ADAU1761 includes five high power output drivers (two 32-lead, 5 mm 5 mm LFCSP differential and three single-ended), supporting stereo head- 40C to +85C operating temperature range phones, an earpiece, or other output transducer. AC-coupled or APPLICATIONS capless configurations are supported. Individual fine level controls are supported on all analog outputs. The output mixer Smartphones/multimedia phones stage allows for flexible routing of audio. Digital still cameras/digital video cameras Portable media players/portable audio players Phone accessories products FUNCTIONAL BLOCK DIAGRAM HP JACK REGULATOR ADAU1761 JACKDET/MICIN DETECTION LAUX LOUTP LINP LOUTN DAC ADC ADC DAC LHP LINN INPUT DIGITAL DIGITAL MIXERS FILTERS FILTERS OUTPUT MONOOUT MIXERS RINP ALC ADC DAC RHP RINN ROUTP ROUTN RAUX 2 MICROPHONE I SERIAL DATA C/SPI MICBIAS PLL BIAS INPUT/OUTPUT PORTS CONTROL PORT MCLK ADDR0/ ADDR1/ SCL/ SDA/ CDATA CCLK COUT CLATCH Figure 1. Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20092018 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. ADC SDATA/ GPIO1 CM BCLK/ GPIO2 IOVDD LRCLK/ DGND GPIO3 DVDDOUT DAC SDATA/ AVDD GPIO0 AVDD AGND AGND 07680-001ADAU1761 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Playback Signal Path ...................................................................... 35 Applications ....................................................................................... 1 Output Signal Paths ................................................................... 35 General Description ......................................................................... 1 Headphone Output .................................................................... 36 Functional Block Diagram .............................................................. 1 Pop-and-Click Suppression ...................................................... 37 Revision History ............................................................................... 3 Line Outputs ............................................................................... 37 Specifications ..................................................................................... 4 Control Ports ................................................................................... 38 Analog Performance Specifications ........................................... 4 Burst Mode Writing and Reading ............................................ 38 2 Power Supply Specifications........................................................ 7 I C Port ........................................................................................ 38 Typical Current Consumption .................................................... 8 SPI Port ........................................................................................ 41 Typical Power Management Measurements ............................. 9 Serial Data Input/Output Ports .................................................... 42 Digital Filters ............................................................................... 10 Applications Information .............................................................. 44 Digital Input/Output Specifications......................................... 10 Power Supply Bypass Capacitors .............................................. 44 Digital Timing Specifications ................................................... 11 GSM Noise Filter ........................................................................ 44 Digital Timing Diagrams........................................................... 12 Grounding ................................................................................... 44 Absolute Maximum Ratings .......................................................... 14 Exposed Pad PCB Design ......................................................... 44 Thermal Resistance .................................................................... 14 DSP Core ......................................................................................... 45 ESD Caution ................................................................................ 14 Signal Processing ........................................................................ 45 Pin Configuration and Function Descriptions ........................... 15 Architecture ................................................................................ 45 Typical Performance Characteristics ........................................... 17 Program Counter ....................................................................... 45 System Block Diagrams ................................................................. 20 Features ........................................................................................ 45 Theory of Operation ...................................................................... 23 Startup .......................................................................................... 45 Startup, Initialization, and Power ................................................. 24 Numeric Formats ....................................................................... 46 Power-Up Sequence ................................................................... 24 Programming .............................................................................. 46 Power Reduction Modes ............................................................ 24 Program RAM, Parameter RAM, and Data RAM ..................... 47 Digital Power Supply .................................................................. 24 Program RAM ............................................................................ 47 Input/Output Power Supply ...................................................... 24 Parameter RAM .......................................................................... 47 Clock Generation and Management ........................................ 24 Data RAM ................................................................................... 47 Clocking and Sampling Rates ....................................................... 26 Read/Write Data Formats ......................................................... 47 Core Clock ................................................................................... 26 Software Safeload ....................................................................... 48 Sampling Rates ............................................................................ 27 Software Slew .............................................................................. 49 PLL ............................................................................................... 27 General-Purpose Input/Output .................................................... 50 Record Signal Path .......................................................................... 29 GPIO Pins Set from the Control Port ...................................... 50 Input Signal Paths ....................................................................... 29 Control Registers ............................................................................ 51 Analog-to-Digital Converters ................................................... 31 Control Register Details ............................................................ 52 Automatic Level Control (ALC) ................................................... 32 Outline Dimensions ....................................................................... 93 ALC Parameters .......................................................................... 32 Ordering Guide .......................................................................... 93 Noise Gate Function .................................................................. 33 Rev. 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