Low Noise Stereo Codec with SigmaDSP Processing Core ADAU1781 FEATURES GENERAL DESCRIPTION 24-bit stereo audio ADC and DAC The ADAU1781 is a low power, 24-bit stereo audio codec. The 400 mW speaker amplifier (into 8 load) low noise DAC and ADC support sample rates from 8 kHz to Programmable SigmaDSP audio processing core 96 kHz. Low current draw and power saving modes make the Wind noise detection and filtering ADAU1781 ideal for battery-powered audio applications. Enhanced stereo capture (ESC) Dynamics processing A programmable SigmaDSP core provides enhanced record Equalization and filtering and playback processing to improve overall audio quality. Volume control and mute The record path includes two digital stereo microphone inputs Sampling rates from 8 kHz to 96 kHz and an analog stereo input path. The analog inputs can be Stereo pseudo differential microphone input configured for either a pseudo differential or a single-ended Optional stereo digital microphone input pulse-density stereo source. A dedicated analog beep input signal can be modulation (PDM) mixed into any output path. The ADAU1781 includes a stereo Stereo line output line output and speaker driver, which makes the device capable of PLL supporting a range of input clock rates supporting dynamic speakers. Analog and digital I/O 1.8 V to 3.3 V Software control via SigmaStudio graphical user interface 2 The serial control bus supports the I C or SPI protocols, and Software-controllable, clickless mute 2 the serial audio bus is programmable for I S, left-justified, right- Software register and hardware pin standby mode justified, or TDM mode. A programmable PLL supports flexible 32-lead, 5 mm 5 mm LFCSP clock generation for all standard rates and available master clocks APPLICATIONS from 11 MHz to 20 MHz. Digital still cameras Digital video cameras FUNCTIONAL BLOCK DIAGRAM ADAU1781 REGULATOR BEEP PGA SigmaDSP CORE LMIC/LMICN/ AOUTL WIND NOISE MICD1 AOUTR LEFT LEFT NOTCH FILTER PGA ADC DAC LMICP OUTPUT EQUALIZER MIXER DIGITAL VOLUME RMIC/RMICN/ CONTROL MICD2 SPP DYNAMIC RIGHT RIGHT PROCESSING PGA SPN ADC DAC RMICP PDN 2 MICROPHONE SERIAL DATA I C/SPI MICBIAS PLL BIAS INPUT/OUTPUT PORTS CONTROL PORT Figure 1. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 20092011 Analog Devices, Inc. All rights reserved. OBSOLETE CM MCKI IOVDD DGND ADC SDATA/ GPIO1 DVDDOUT AVDD1 BCLK/GPIO2 AGND1 LRCLK/GPIO3 AVDD2 AGND2 DAC SDATA/ GPIO0 ADDR0/CDATA ADDR1/CLATCH SCL/CCLK SDA/COUT 08314-001ADAU1781 TABLE OF CONTENTS Features .............................................................................................. 1 Input Signal Path ........................................................................ 30 Applications ....................................................................................... 1 Analog-to-Digital Converters ................................................... 31 General Description ......................................................................... 1 Playback Signal Path ...................................................................... 32 Functional Block Diagram .............................................................. 1 Output Signal Paths ................................................................... 32 Revision History ............................................................................... 3 Digital-to-Analog Converters ................................................... 32 Specifications ..................................................................................... 4 Line Outputs ............................................................................... 32 Record Side Performance Specifications ................................... 4 Speaker Output ........................................................................... 32 Output Side Performance Specifications ................................... 6 Control Ports ................................................................................... 33 2 Power Supply Specifications........................................................ 8 I C Port ........................................................................................ 33 Typical Power Management Measurements ............................. 9 SPI Port ........................................................................................ 36 Digital Filters ................................................................................. 9 Memory and Register Access .................................................... 36 Digital Input/Output Specifications......................................... 10 Serial Data Input/Output Ports .................................................... 38 Digital Timing Specifications ................................................... 11 TDM Modes ................................................................................ 38 Absolute Maximum Ratings .......................................................... 14 General-Purpose Input/Outputs .................................................. 40 Thermal Resistance .................................................................... 14 DSP Core ......................................................................................... 41 ESD Caution ................................................................................ 14 Signal Processing ........................................................................ 41 Pin Configuration and Function Descriptions ........................... 15 Architecture ................................................................................ 41 Typical Performance Characteristics ........................................... 17 Program Counter ....................................................................... 41 System Block Diagrams ................................................................. 20 Features ........................................................................................ 41 Theory of Operation ...................................................................... 24 Numeric Formats ....................................................................... 42 Startup, Initialization, and Power ................................................. 25 Programming .............................................................................. 42 Power-Up Sequence ................................................................... 25 Program RAM, Parameter RAM, and Data RAM ..................... 44 Clock Generation and Management ........................................ 26 Program RAM ............................................................................ 44 Enabling Digital Power to Functional Subsystems ................ 26 Parameter RAM .......................................................................... 44 Setting Up the SigmaDSP Core ................................................ 26 Data RAM ................................................................................... 44 Power Reduction Modes ............................................................ 26 Read/Write Data Formats ......................................................... 44 Power-Down Sequence .............................................................. 26 Software Safeload ....................................................................... 45 Clocking and Sampling Rates ....................................................... 27 Software Slew .............................................................................. 46 Core Clock ................................................................................... 27 Applications Information .............................................................. 47 Sampling Rates ............................................................................ 27 Power Supply Bypass Capacitors .............................................. 47 PLL................................................................................................ 28 GSM Noise Filter ........................................................................ 47 Record Signal Path .......................................................................... 30 Grounding ................................................................................... 47 Rev. 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