X-On Electronics has gained recognition as a prominent supplier of EVAL-ADAU1962AZ Data Conversion IC Development Tools across the USA, India, Europe, Australia, and various other global locations. EVAL-ADAU1962AZ Data Conversion IC Development Tools are a product manufactured by Analog Devices. We provide cost-effective solutions for Data Conversion IC Development Tools, ensuring timely deliveries around the world.

EVAL-ADAU1962AZ Analog Devices

EVAL-ADAU1962AZ electronic component of Analog Devices
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Part No. EVAL-ADAU1962AZ
Manufacturer: Analog Devices
Category: Data Conversion IC Development Tools
Description: Data Conversion IC Development Tools Eval Board for ADAU1962A
Datasheet: EVAL-ADAU1962AZ Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



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1: USD 1040.8387 ea
Line Total: USD 1040.84 
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MOQ: 1  Multiples: 1
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MOQ : 1
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1 : USD 1671.1123

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Ship by Fri. 13 Sep to Tue. 17 Sep
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12-Channel, High Performance, 192 kHz, 24-Bit DAC Data Sheet ADAU1962A FEATURES GENERAL DESCRIPTION Differential or single-ended voltage DAC output The ADAU1962A is a high performance, single-chip digital-to- 114 dB DAC dynamic range, A-weighted, differential analog converter (DAC) that provides 12 DACs with differential or 97 dB total harmonic distortion plus noise (THD + N), single-ended outputs using the Analog Devices, Inc., patented differential multibit sigma-delta (-) architecture. A serial peripheral interface 2 110 dB DAC dynamic range, A-weighted, single-ended (SPI)/I C port is included, allowing a microcontroller to adjust 95 dB THD + N, single-ended volume and many other parameters. The ADAU1962A operates 2.5 V digital and 3.3 V analog and input/output (I/O) supplies from 2.5 V digital and 3.3 V analog supplies. A linear regulator 249 mW total quiescent power is included to generate the digital supply voltage from the analog Phase-locked loop (PLL) generated or direct master clock supply voltage. The ADAU1962A is available in an 80-lead LQFP. Low electromagnetic interference (EMI) design The ADAU1962A is designed for low EMI. This consideration Linear regulator driver to generate digital supply is apparent in both the system and circuit design architectures. Supports 24-bit and 32 kHz to 192 kHz sample rates By using the on-board PLL to derive the internal master clock from Low propagation 192 kHz sample rate mode an external left-right frame clock (LRCLK), the ADAU1962A Log volume control with autoramp function can eliminate the need for a separate high frequency master clock Temperature sensor with digital readout 3C accuracy and can be used with or without a bit clock. The DACs are 2 SPI and I C controllable for flexibility designed using the latest Analog Devices continuous time Software-controllable clickless mute architectures to further minimize EMI. By using 2.5 V digital Software power-down supplies, power consumption is minimized, and the digital 2 Right justified, left justified, I S, and TDM modes waveforms are a smaller amplitude, further reducing emissions. Master and slave modes with up to 12-channel input/output Note that throughout this data sheet, multifunction pins, such 80-lead LQFP package as SCLK/SCL, are referred to by the entire pin name or by a Qualified for automotive applications single function of the pin, for example, SCLK, when only that APPLICATIONS function is relevant. Automotive audio systems Home theater systems Digital audio effects processors FUNCTIONAL BLOCK DIAGRAM DIGITAL AUDIO INPUT ADAU1962A SERIAL DATA PORT DAC DAC SDATA SDATA DAC DAC IN IN DIGITAL DIGITAL DAC FILTER CLOCKS FILTER DAC ANALOG ANALOG AND AND AUDIO AUDIO VOLUME VOLUME OUTPUTS DAC DAC OUTPUTS CONTROL CONTROL TIMING MANAGEMENT AND CONTROL DAC DAC (CLOCK AND PLL) DAC DAC 2 SPI/I C PRECISION INTERNAL CONTROL PORT VOLTAGE TEMP REFERENCE SENSOR CONTROL DATA INPUT/OUTPUT Figure 1. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20132016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 11371-001ADAU1962A Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 PLL and Clock Control 0 Register ........................................... 25 Applications ....................................................................................... 1 PLL and Clock Control 1 Register ........................................... 26 General Description ......................................................................... 1 Block Power-Down and Thermal Sensor Control 1 Register27 Functional Block Diagram .............................................................. 1 Power-Down Control 2 Register .............................................. 28 Revision History ............................................................................... 2 Power-Down Control 3 Register .............................................. 29 Specif icat ions ..................................................................................... 3 Thermal Sensor Temperature Readout Register .................... 29 Analog Performance Specifications: T = 25C ....................... 3 DAC Control 0 Register ............................................................ 30 A Analog Performance Specifications: T = 105C ..................... 4 DAC Control 1 Register ............................................................ 31 A Crystal Oscillator Specifications................................................. 4 DAC Control 2 Register ............................................................ 32 Digital Input/Output Specifications........................................... 5 DAC Individual Channel Mutes 1 Register ............................ 33 Power Supply Specifications........................................................ 5 DAC Individual Channel Mutes 2 Register ............................ 34 Digital Filters ................................................................................. 6 Master Volume Control Register .............................................. 35 Timing Specifications .................................................................. 6 DAC 1 Volume Control Register .............................................. 35 Absolute Maximum Ratings ............................................................ 8 DAC 2 Volume Control Register .............................................. 36 Thermal Resistance ...................................................................... 8 DAC 3 Volume Control Register .............................................. 36 ESD Caution .................................................................................. 8 DAC 4 Volume Control Register .............................................. 37 Pin Configuration and Function Descriptions ............................. 9 DAC 5 Volume Control Register .............................................. 37 Typical Performance Characteristics ........................................... 12 DAC 6 Volume Control Register .............................................. 38 Typical Application Circuits .......................................................... 13 DAC 7 Volume Control Register .............................................. 38 Theory of Operation ...................................................................... 14 DAC 8 Volume Control Register .............................................. 39 DACs ............................................................................................ 14 DAC 9 Volume Control Register .............................................. 39 Clock Signals ............................................................................... 14 DAC 10 Volume Control Register ............................................ 40 Power-Up and Reset ................................................................... 16 DAC 11 Volume Control Register ............................................ 40 Standalone Mode ........................................................................ 16 DAC 12 Volume Control Register ............................................ 41 2 I C Control Port .......................................................................... 16 Pad Strength Register ................................................................. 41 Serial Control Port: SPI Control Mode ................................... 19 DAC Power Adjust 1 Register ................................................... 42 Power Supply and Voltage Reference ....................................... 20 DAC Power Adjust 2 Register ................................................... 43 Serial Data PortsData Format ............................................... 20 DAC Power Adjust 3 Register ..................................................... 44 Time-Division Multiplexed (TDM) Modes ............................ 21 Outline Dimensions ....................................................................... 48 Temperature Sensor ................................................................... 21 Ordering Guide .......................................................................... 48 Additional Modes ....................................................................... 23 Automotive Products ................................................................. 48 Register Summary .......................................................................... 24 Register Details ............................................................................... 25 REVISION HISTORY 3/16Rev. 0 to Rev. A 7/13Revision 0: Initial Version Changes to Table 4 ............................................................................ 5 Rev. A Page 2 of 48

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