SPI Interface, 4 R , 15 V/+12 V/5 V, ON 1.8 V Logic Control, 8:1/Dual 4:1 Muxes Data Sheet ADGS1408/ADGS1409 FEATURES FUNCTIONAL BLOCK DIAGRAMS SPI interface with error detection ADGS1408 Includes CRC, invalid read/write address, and SCLK count S1 error detection Supports burst mode and daisy-chain mode Industry-standard SPI Mode 0 and SPI Mode 3 interface D compatible Round robin mode allows switching times comparable with a S8 parallel interface GPO1 General-purpose digital outputs to control other devices, CNV GPO2 SPI GPO3 INTERFACE such as parallel switches from Analog Devices, Inc. SDO GPO4 4 typical on resistance at 25C 0.5 typical on-resistance flatness at 25C SCLK SDI CS RESET/V L 0.2 typical on-resistance match between channels at 25C Figure 1. ADGS1408 Functional Block Diagram V to V analog signal range SS DD ADGS1409 Fully specified at 15 V, 5 V, and +12 V Power-up sequence of V , V , and GND before applying S1A DD SS DA V and digital/analog inputs L S4A 1.8 V logic compatibility with 2.7 V V 3.3 V L 24-lead LFCSP package S1B APPLICATIONS DB S4B Automated test equipment GPO1 Data acquisition systems CNV GPO2 SPI GPO3 INTERFACE Battery-powered systems SDO GPO4 Sample-and-hold systems GPO5 Audio signal routing SCLK SDI CS RESET/V Video signal routing L Communications systems Figure 2. ADGS1409 Functional Block Diagram Relay replacement supplies. In the off condition, signal levels up to the supplies GENERAL DESCRIPTION are blocked. The ADGS1408/ADGS1409 are analog multiplexers comprising The on-resistance profile is flat over the full analog input range, eight single channels and four differential channels, respectively. which ensures linearity and low distortion when switching A serial peripheral interface (SPI) controls the switches. The SPI interface has robust error detection features such as cyclic audio signals. redundancy check (CRC) error detection, invalid read/write PRODUCT HIGHLIGHTS address detection, and SCLK count error detection. 1. SPI interface removes the need for parallel conversion, logic traces, and reduces GPIO channel count. It is possible to daisy-chain multiple ADGS1408/ADGS1409 2. Daisy-chain mode removes additional logic traces when devices together. Daisy-chain mode enables the configuration of multiple devices are used. multiple devices with a minimal amount of digital lines. The 3. CRC error detection, invalid read/write address detection, ADGS1408/ADGS1409 can also operate in burst mode to and SCLK count error detection ensure a robust digital decrease the time between SPI commands. interface. iCMOS construction ensures ultra low power dissipation, making 4. CRC and error detection capabilities allow the use of the the devices ideally suited for portable and battery-powered ADGS1408/ADGS1409 in safety critical systems. instruments. 5. Minimal distortion. Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. 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Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 16791-002 16791-001ADGS1408/ADGS1409 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Software Reset ............................................................................. 24 Applications ....................................................................................... 1 Daisy-Chain Mode ..................................................................... 24 Functional Block Diagrams ............................................................. 1 Power-On Reset .......................................................................... 25 General Description ......................................................................... 1 Round Robin Mode.................................................................... 26 Product Highlights ........................................................................... 1 General-Purpose Outputs (GPOs) .......................................... 27 Revision History ............................................................................... 2 Applications Information .............................................................. 28 Specif icat ions ..................................................................................... 3 Digital Input Buffers .................................................................. 28 15 V Dual Supply ....................................................................... 3 Power Supply Rails ..................................................................... 28 5 V Dual Supply ......................................................................... 5 Power Supply Recommendations ............................................. 28 12 V Single Supply ........................................................................ 7 Power Supply Sequencing ......................................................... 28 Continuous Current per Channel, Sx or Dx ............................. 9 Register Summaries ........................................................................ 29 Timing Characteristics .............................................................. 10 Register Details ............................................................................... 30 Absolute Maximum Ratings .......................................................... 12 Switch Data Register .................................................................. 30 Thermal Resistance .................................................................... 12 Error Configuration Register .................................................... 31 ESD Caution ................................................................................ 12 Error Flags Register .................................................................... 31 Pin Configurations and Function Descriptions ......................... 13 Burst Enable Register ................................................................. 32 Typical Performance Characteristics ........................................... 15 Round Robin Enable Register ................................................... 32 Test Circuits ..................................................................................... 19 Round Robin Channel Configuration Register ..................... 32 Terminology .................................................................................... 22 CNV Edge Select Register ......................................................... 33 Theory of Operation ...................................................................... 23 Software Reset Register ............................................................. 33 Address Mode ............................................................................. 23 Outline Dimensions ....................................................................... 34 Error Detection Features ........................................................... 23 Ordering Guide .......................................................................... 34 Clearing the Error Flags Register ............................................. 24 Burst Mode .................................................................................. 24 REVISION HISTORY 6/2018Revision 0: Initial Version Rev. 0 Page 2 of 34