SPI Interface, Octal SPST Switches, 13.5 R , 20 V/+36 V, Mux ON Data Sheet ADGS5414 FEATURES FUNCTIONAL BLOCK DIAGRAM SPI interface with error detection ADGS5414 Includes CRC, invalid read/write address, and SCLK count S1 D1 S2 D2 error detection S3 D3 Supports burst and daisy-chain mode S4 D4 Industry-standard SPI Mode 0 and Mode 3 interface- S5 D5 compatible S6 D6 Guaranteed break-before-make switching, allowing external S7 D7 wiring of switches to deliver multiplexer configurations S8 D8 V to V analog signal range SS DD SPI SDO Fully specified at 15 V, 20 V, +12 V, and +36 V INTERFACE 9 V to 40 V single-supply operation (V ) DD 9 V to 22 V dual-supply operation (V /V ) SCLK SDI CS RESET/V DD SS L 8 kV HBM ESD rating Figure 1. Low on resistance 1.8 V logic compatibility with 2.7 V V 3.3 V L APPLICATIONS Relay replacement Automatic test equipment Data acquisition Instrumentation Avionics Audio and video switching Communication systems GENERAL DESCRIPTION The ADGS5414 contains eight independent single-pole/single- PRODUCT HIGHLIGHTS throw (SPST) switches. An SPI interface controls the switches 1. The SPI interface removes the need for parallel conversion, and has robust error detection features, including cyclic logic traces, and reduces the general-purpose input/output redundancy check (CRC) error detection, invalid read/write (GPIO) channel count. address error detection, and SCLK count error detection. 2. Daisy-chain mode removes the need for additional logic It is possible to daisy-chain multiple ADGS5414 devices together. traces when using multiple devices. This enables the configuration of multiple devices with a minimal 3. CRC error detection, invalid read/write address error amount of digital lines. The ADGS5414 can also operate in burst detenction, and SCLK count error detection ensures a mode to decrease the time between SPI commands. robust digital interface. 4. CRC and error detection capabilities allow the use of the Each switch conducts equally well in both directions when on, and ADGS5414 in safety critical systems. each switch has an input signal range that extends to the supplies. 5. Break-before-make switching allows external wiring of the In the off condition, signal levels up to the supplies are blocked. switches to deliver multiplexer configurations. The on-resistance profile is flat over the full analog input range, 6. The trench isolation analog switch section guards against ensuring ideal linearity and low distortion when switching latch-up. A dielectric trench separates the positive and audio signals. The ADGS5414 exhibits break-before-make negative channel transistors, preventing latch-up even under switching action, allowing the use of the device in multiplexer severe overvoltage conditions. applications with external wiring. Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. Tel: 781.329.4700 2017 Analog Devices, Inc. All rights reserved. No license is granted by implication or otherwise under any patent or patent rights of Analog Technical Support www.analog.com Devices. Trademarks and registered trademarks are the property of their respective owners. 15902-001ADGS5414 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Error Detection Features ........................................................... 22 Applications ....................................................................................... 1 Clearing the Error Flags Register ............................................. 23 Functional Block Diagram .............................................................. 1 Burst Mode .................................................................................. 23 General Description ......................................................................... 1 Software Reset ............................................................................. 23 Product Highlights ........................................................................... 1 Daisy-Chain Mode ..................................................................... 23 Revision History ............................................................................... 1 Power-On Reset .......................................................................... 24 Specif icat ions ..................................................................................... 3 Break-Before-Make Switching .................................................. 25 15 V Dual Supply ....................................................................... 3 Trench Isolation .......................................................................... 25 20 V Dual Supply ....................................................................... 5 Applications Information .............................................................. 26 12 V Single Supply ........................................................................ 7 Power Supply Rails ..................................................................... 26 36 V Single Supply ........................................................................ 9 Power Supply Recommendations ............................................. 26 Continuous Current per Channel, Sx or Dx Pins .................. 11 Register Summary .......................................................................... 27 Timing Characteristics .............................................................. 11 Register Details ............................................................................... 28 Absolute Maximum Ratings .......................................................... 13 Switch Data Register .................................................................. 28 Thermal Resistance .................................................................... 13 Error Configuration Register .................................................... 28 ESD Caution ................................................................................ 13 Error Flags Register .................................................................... 29 Pin Configurations and Function Descriptions ......................... 14 Burst Enable Register ................................................................. 29 Typical Performance Characteristics ........................................... 15 Software Reset Register ............................................................. 29 Test Circuits ..................................................................................... 19 Outline Dimensions ....................................................................... 30 Terminology .................................................................................... 21 Ordering Guide .......................................................................... 30 Theory of Operation ...................................................................... 22 Address Mode ............................................................................. 22 REVISION HISTORY 10/2017Revision 0: Initial Version Rev. 0 Page 2 of 30