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EVAL-ADUC7023QSPZ1 Analog Devices

EVAL-ADUC7023QSPZ1 electronic component of Analog Devices
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Part No.EVAL-ADUC7023QSPZ1
Manufacturer: Analog Devices
Category: Development Boards & Kits - ARM
Description: Analog Devices Development Boards & Kits - ARM EVAL-ADUC7023QSPZ1
Datasheet: EVAL-ADUC7023QSPZ1 Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



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Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU with Enhanced IRQ Handler Data Sheet ADuC7023 FEATURES APPLICATIONS Analog I/O Optical networking Multichannel, 12-bit, 1 MSPS ADC Industrial control and automation systems Up to 12 ADC channels Smart sensors, precision instrumentation Fully differential and single-ended modes Base station systems 0 V to V analog input range REF GENERAL DESCRIPTION 12-bit voltage output DACs The ADuC7023 is a fully integrated, 1 MSPS, 12-bit data acquisition 4 DAC outputs available system, incorporating high performance multichannel ADCs, On-chip voltage reference 16-bit/32-bit MCUs, and Flash/EE memory on a single chip. On-chip temperature sensor Voltage comparator The ADC consists of up to 12 single-ended inputs. An additional four inputs are available but are multiplexed with the four DAC output Microcontroller pins. The ADC can operate in single-ended or differential input ARM7TDMI core, 16-bit/32-bit RISC architecture modes. The ADC input voltage is 0 V to V . A low drift band gap JTAG port supports code download and debug REF Clocking options reference, temperature sensor, and voltage comparator complete the ADC peripheral set. Trimmed on-chip oscillator (3%) External watch crystal The DAC output range is programmable to one of two voltage ranges. External clock source up to 44 MHz The DAC outputs have an enhanced feature of being able to retain 41.78 MHz PLL with programmable divider their output voltage during a watchdog or software reset sequence. Memory The devices operate from an on-chip oscillator and a PLL, generating 62 kB Flash/EE memory, 8 kB SRAM an internal high frequency clock of 41.78 MHz. This clock is routed In-circuit download, JTAG-based debug through a programmable clock divider from which the MCU core Software-triggered in-circuit reprogrammability clock operating frequency is generated. The microcontroller core is an Vectored interrupt controller for FIQ and IRQ ARM7TDMI, 16-bit/32-bit RISC machine that offers up to 41 MIPS 8 priority levels for each interrupt type peak performance. Eight kilobytes of SRAM and 62 kilobytes of Interrupt on edge or level external pin inputs nonvolatile Flash/EE memory are provided on chip. The ARM7TDMI On-chip peripherals core views all memory and registers as a single linear array. 2 2 fully I C-compatible channels The ADuC7023 contains an advanced interrupt controller. The SPI (20 Mbps in master mode, 10 Mbps in slave mode) vectored interrupt controller (VIC) allows every interrupt to be With 4-byte FIFO on input and output stages assigned a priority level. It also supports nested interrupts to a Up to 20 GPIO pinsDigital only GPIOs are 5 V tolerant maximum level of eight per IRQ and FIQ. When IRQ and FIQ 3 general-purpose timers interrupt sources are combined, a total of 16 nested interrupt Watchdog timer (WDT) levels are supported. Programmable logic array (PLA) 2 On-chip factory firmware supports in-circuit download via the I C 16 PLA elements serial interface port, and nonintrusive emulation is supported via 16-bit, 5-channel PWM the JTAG interface. These features are incorporated into a low cost Power QuickStart development system supporting this MicroConverter Specified for 3 V operation family. The part contains a 16-bit PWM with five output signals. Active mode: 11 mA at 5 MHz, 28 mA at 41.78 MHz 2 For communication purposes, the part contains 2 I C channels that Packages and temperature range can be individually configured for master or slave mode. An SPI 32-lead 5 mm 5 mm LFCSP interface supporting both master and slave modes is also provided. 40-lead LFCSP The parts operate from 2.7 V to 3.6 V and are specified over an 36-Lead WLCSP industrial temperature range of 40C to +125C. The ADuC7023 is Fully specified for 40C to +125C operation available in either a 32-lead or 40-lead LFCSP package. A 36-ball Tools wafer level CSP package (WLCSP) is also available. Low cost QuickStart development system Full third-party support Rev. H Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. Tel: 781.329.4700 20102020 Analog Devices, Inc. All rights reserved. No license is granted by implication or otherwise under any patent or patent rights of Analog Technical Support www.analog.com Devices. Trademarks and registered trademarks are the property of their respective owners. ADuC7023 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Flash/EE Control Interface ....................................................... 40 Applications ...................................................................................... 1 Execution Time from SRAM and Flash/EE ........................... 43 General Description ......................................................................... 1 Reset and Remap ........................................................................ 43 Revision History ............................................................................... 3 Other Analog Peripherals ............................................................. 46 Functional Block Diagram .............................................................. 5 DAC ............................................................................................. 46 Specifications .................................................................................... 6 Power Supply Monitor .............................................................. 48 Timing Specifications .................................................................. 9 Comparator ................................................................................. 48 Absolute Maximum Ratings ......................................................... 14 Oscillator and PLLPower Control ....................................... 50 ESD Caution................................................................................ 14 Digital Peripherals .......................................................................... 53 Pin Configurations and Function Descriptions ......................... 15 General-Purpose Input/Output ............................................... 53 Typical Performance Characteristics ........................................... 19 Serial Peripheral Interface ......................................................... 56 2 Terminology .................................................................................... 20 I C ..................................................................................................... 61 2 ADC Specifications .................................................................... 20 Configuring External Pins for I C Functionality ................... 61 DAC Specifications .................................................................... 20 Serial Clock Generation ............................................................ 61 2 Overview of the ARM7TDMI Core ............................................. 21 I C Bus Addresses ...................................................................... 61 2 Thumb Mode (T) ....................................................................... 21 I C Registers ................................................................................ 62 Long Multiply (M) ..................................................................... 21 Programmable Logic Array (PLA) .......................................... 69 EmbeddedICE (I) ....................................................................... 21 Pulse-Width Modulator ................................................................ 73 Exceptions ................................................................................... 21 Pulse-Width Modulator General Overview ........................... 73 ARM Registers ............................................................................ 21 Processor Reference Peripherals .................................................. 78 Interrupt Latency........................................................................ 22 Interrupt System ......................................................................... 78 Memory Organization ................................................................... 23 IRQ ............................................................................................... 78 Memory Access ........................................................................... 23 Fast Interrupt Request (FIQ) .................................................... 79 Flash/EE Memory ....................................................................... 23 Vectored Interrupt Controller (VIC) ...................................... 80 SRAM ........................................................................................... 23 Timers .......................................................................................... 85 Memory Mapped Registers ....................................................... 23 Hardware Design Considerations .................................................. 90 ADC Circuit Overview .................................................................. 31 Power Supplies ............................................................................. 90 Transfer Function ...................................................................... 31 Grounding and Board Layout Recommendations ................ 91 Typical Operation ...................................................................... 32 Clock Oscillator .......................................................................... 91 MMR Interface ........................................................................... 32 Power-On Reset Operation ...................................................... 92 Converter Operation .................................................................. 35 Typical System Configuration .................................................. 93 Driving the Analog Inputs ........................................................ 36 Development Tools ........................................................................ 94 Calibration ................................................................................... 36 PC-Based Tools .......................................................................... 94 2 Temperature Sensor ................................................................... 36 In-Circuit I C Downloader ....................................................... 94 Band Gap Reference ................................................................... 38 Outline Dimensions ....................................................................... 95 Nonvolatile Flash/EE Memory ..................................................... 39 Ordering Guide .......................................................................... 97 Programming .............................................................................. 39 Security ........................................................................................ 40 Rev. H Page 2 of 98

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