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EVAL-ADUC7122QSPZ Analog Devices

EVAL-ADUC7122QSPZ electronic component of Analog Devices
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Part No.EVAL-ADUC7122QSPZ
Manufacturer: Analog Devices
Category: Development Boards & Kits - ARM
Description: Development Boards & Kits - ARM Quick Start Development System
Datasheet: EVAL-ADUC7122QSPZ Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



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1: USD 204.3195 ea
Line Total: USD 204.32 
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Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU Data Sheet ADuC7122 FEATURES Software-triggered in-circuit reprogrammability On-chip peripherals Analog I/O 2 UART, 2 I C and SPI serial I/Os 13-external channel, 12-bit, 1 MSPS ADC 32-pin GPIO port 2 differential channels with programmable gain 4 general-purpose timers PGA (1 to 5) input range Wake-up and watchdog timers (WDT) IOVDD power monitor channel Power supply monitor On-chip temperature monitor Vectored interrupt controller for FIQ and IRQ 11 general-purpose inputs 8 priority levels for each interrupt type Fully differential and single-ended modes Interrupt on edge or level external pin inputs 0 V to V analog input range REF Power 12 12-bit voltage output DACs Specified for 3 V operation On-chip voltage reference: 1.2 V/2.5 V Active mode: 11 mA at 5 MHz, 40 mA at 41.78 MHz Buffered output reference sources for use with external Packages and temperature range circuits 7 mm 7 mm 108-ball BGA Microcontroller Fully specified for 10C to +95C operation ARM7TDMI core, 16-bit/32-bit RISC architecture Tools JTAG port supports code download and debug Low cost QuickStart development system Clocking options Full third-party support Trimmed on-chip oscillator (3%) External watch crystal APPLICATIONS External clock source up to 41.78 MHz Optical networking, industrial control, and automation 41.78 MHz PLL with programmable divider systems Memory Smart sensors and precision instrumentation 126 kB Flash/EE memory, 8 kB SRAM In-circuit download, JTAG-based debug FUNCTIONAL BLOCK DIAGRAM AVDD 3.3V AGND DAC0 DAC1 DAC2 DAC3 DAC4 DAC5 DAC6 DAC7 DAC8 DAC BUF DAC9 PADC0 PGA DAC BUF DAC10 PADC1 PGA DAC BUF DAC11 ADC0 ADC1 1MSPS ADC2 12-BIT PLA SAR ADC ADC3 ADC4 OSC PLL POR PWM ADC5 8k SRAM IOVDD WAKE-UP 3 GP ADC6 (2k 32-BIT) TIMER TIMERS LDO IOGND ADC7 WD 126k ADC8 ADuC7122 XTALI TIMER FLASH ARM7 ADC9 (63k XTALO TDMI UART ADC10 VIC 16-BIT) RST IOVDD MON TEMPERATURE TDO GPIO 2 JTAG SPI 1 C 2 SENSOR CONTROL TDI TCK INTERNAL BUF REFERENCE TMS TRST V 1.2 V 2.5 REF REF P0.0 TO P0.7 P1.0 TO P1.7 P2.0 TO P2.7 P3.0 TO P3.7 Figure 1. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20102014 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. DAC BUF DAC BUF DAC BUF DAC BUF DAC BUF DAC BUF DAC BUF DAC BUF DAC BUF 08755-001ADuC7122 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Other Analog Peripherals .............................................................. 43 Applications ....................................................................................... 1 DAC .............................................................................................. 43 Functional Block Diagram .............................................................. 1 LDO (Low dropout Regulator)................................................. 45 Revision History ............................................................................... 3 Oscillator and PLLPower Control ............................................ 46 General Description ......................................................................... 4 External Crystal Selection ......................................................... 46 Specifications ..................................................................................... 5 External Clock Selection ........................................................... 46 Timing Specifications .................................................................. 9 Power Control System ............................................................... 47 Absolute Maximum Ratings .......................................................... 14 MMRs and Keys ......................................................................... 48 ESD Caution ................................................................................ 14 Digital Peripherals .......................................................................... 49 Pin Configuration and Function Descriptions ........................... 15 PWM General Overview ........................................................... 49 Terminology .................................................................................... 19 PWM Convert Start Control .................................................... 51 ADC Specifications .................................................................... 19 General-Purpose I/O ..................................................................... 52 DAC Specifications..................................................................... 19 UART Serial Interface .................................................................... 54 Overview of the ARM7TDMI Core ............................................. 20 Baud Rate Generation ................................................................ 54 Thumb Mode (T) ........................................................................ 20 UART Register Definition ......................................................... 54 2 Long Multiply (M) ...................................................................... 20 I C ..................................................................................................... 59 EmbeddedICE (I) ....................................................................... 20 Serial Clock Generation ............................................................ 59 2 Exceptions ................................................................................... 20 I C Bus Addresses ....................................................................... 59 2 ARM Registers ............................................................................ 20 I C Registers ................................................................................ 60 2 Interrupt Latency ........................................................................ 21 I C Common Registers .............................................................. 68 Memory Organization ................................................................... 22 Serial Peripheral Interface ............................................................. 69 Flash/EE Memory ....................................................................... 22 SPIMISO (Master In, Slave Out) Pin ....................................... 69 SRAM ........................................................................................... 22 SPIMOSI (Master Out, Slave In) Pin ....................................... 69 Memory Mapped Registers ....................................................... 22 SPICLK (Serial Clock I/O) Pin ................................................. 69 Complete MMR Listing ............................................................. 23 SPI Chip Select (SPICS Input) Pin ........................................... 69 ADC Circuit Overview .................................................................. 27 Configuring External Pins for SPI Functionality ................... 69 ADC Transfer Function ............................................................. 28 SPI Registers ................................................................................ 70 Typical Operation ....................................................................... 29 Programmable Logic Array (PLA) ............................................... 73 Temperature Sensor ................................................................... 30 Interrupt System ............................................................................. 76 Converter Operation .................................................................. 33 IRQ ............................................................................................... 77 Driving the Analog Inputs ........................................................ 34 Fast Interrupt Request (FIQ) .................................................... 77 Band Gap Reference ................................................................... 34 Timers .......................................................................................... 83 Power Supply Monitor ............................................................... 35 Hour:Minute:Second:1/128 Format ......................................... 83 Nonvolatile Flash/EE Memory ..................................................... 36 Timer0Lifetime Timer ........................................................... 84 Flash/EE Memory Overview ..................................................... 36 Timer1General-Purpose Timer ........................................... 85 Flash/EE Memory ....................................................................... 36 Timer2Wake-Up Timer ......................................................... 87 Flash/EE Memory Security ....................................................... 37 Timer3Watchdog Timer ........................................................ 89 Flash/EE Control Interface ........................................................ 37 Timer4General-Purpose Timer ........................................... 91 Execution Time from SRAM and FLASH/EE ........................ 40 Hardware Design Considerations ................................................ 93 Reset and Remap ........................................................................ 41 Power Supplies ............................................................................ 93 Rev. A Page 2 of 96

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