Single Gate, Adjustable Slew Rate, Isolated Gate Driver, 3 A Short-Circuit (<3 ) Data Sheet ADuM4122 FEATURES GENERAL DESCRIPTION 2 A output current per output pin (<3 R ) The ADuM4122 is an isolated, single device, dual output driver DSON X 3 A peak short-circuit current that uses iCoupler technology to provide precision isolation. 3.3 V to 6.5 V, V DD1 The ADuM4122 provides 5 kV rms isolation in the wide-body, 4.5 V to 35 V, V DD2 8-lead SOIC package. These isolation components combine Positive going threshold, UVLO at 3.3 V V DD1 high speed complementary metal-oxide semiconductor (CMOS) Multiple positive going thresholds, UVLO options on V DD2 and monolithic transformer technology to provide performance Grade A: 4.4 V (typical) positive going threshold, UVLO characteristics superior to alternatives (such as a combination of Grade B: 7.3 V (typical) positive going threshold, UVLO pulse transformers and gate drivers). Grade C: 11.3 V (typical) positive going threshold, UVLO The ADuM4122 operates with an input supply voltage range Precise timing characteristics from 3.3 V to 6.5 V, providing compatibility with lower voltage 48 ns maximum propagation delay for falling edge systems. Unlike gate drivers that employ high voltage level CMOS input logic levels translation methodologies, the ADuM4122 offers true galvanic High common-mode transient immunity: >150 kV/s isolation between the input and the output regions. High junction temperature operation: 125C The ADuM4122 includes two output pins that facilitate slew Default low output rate control of two output drive strengths. The V pin follows OUT Selectable slew rate control the logic of the V pin, while the boosting output, V , IN+ OUT SRC Safety and regulatory approvals (pending) can be toggled to follow the VIN+ pin or to go high-Z. The UL recognition per UL 1577 toggling of the slew rate is controlled by the primary side. Slew 5 kV rms for 1 minute rate control can allow for electromagnetic interference (EMI) CSA Component Acceptance Notice 5A mitigation and voltage overshoot control. VDE certificate of conformity (pending) DIN V VDE V 0884-10 An internal thermal shutdown sets outputs low if internal V = 849 V peak IORM temperatures on the ADuM4122 exceed the thermal shutdown Wide-body, 8-lead SOIC IC temperature. APPLICATIONS As a result, the ADuM4122 provides reliable control over the switching characteristics of insulated gate bipolar transistor (IGBT) Switching power supplies and metal-oxide semiconductor field effect transistor (MOSFET) Isolated IGBT and MOSFET gate drivers configurations over a wide range of switching voltages, allowing Industrial inverters for simple slew rate control. FUNCTIONAL BLOCK DIAGRAM UVLO TSD ADuM4122 V 1 8 V DD1 DD2 DECODE ENCODE AND SRC 2 7 V OUT LOGIC ENCODE V 3 6 V IN+ OUT SRC 5 GND 4 GND 1 UVLO 2 Figure 1. 1 Protected by U.S. Patents 5,952,849 6,873,065 7,075,239. Other patents pending. Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2019 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 17024-001ADuM4122 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Pin Configuration and Function Descriptions ..............................8 Applications ....................................................................................... 1 Truth Table .....................................................................................8 General Description ......................................................................... 1 Typical Performance Characteristics ..............................................9 Functional Block Diagram .............................................................. 1 Theory of Operation ...................................................................... 13 Revision History ............................................................................... 2 Applications Information .............................................................. 14 Specifications ..................................................................................... 3 PCB Layout ................................................................................. 14 Electrical Specifications ............................................................... 3 Slew Rate Control ....................................................................... 14 Regulatory Information ............................................................... 4 Propagation Delay-Related Parameters ................................... 15 Package Specifications ................................................................. 5 Peak Current Rating ................................................................... 15 Insulation and Safety Specifications........................................... 5 Undervoltage Lockout ............................................................... 15 DIN V VDE V 0884-10 (VDE V 0884-10) Insulation Output Load Characteristics ..................................................... 15 Characteristics .............................................................................. 5 Power Dissipation....................................................................... 16 Recommended Operating Conditions ...................................... 6 Insulation Lifetime ..................................................................... 16 Absolute Maximum Ratings ............................................................ 7 Typical Applications ................................................................... 17 Thermal Resistance ...................................................................... 7 Outline Dimensions ....................................................................... 18 ESD Caution .................................................................................. 7 Ordering Guide .......................................................................... 18 REVISION HISTORY 2/2019Revision 0: Initial Version Rev. 0 Page 2 of 18