ADV7280/ADV7281/ADV7282/ADV7283 Hardware Reference Manual UG-637 One Technology Way P.O. Box 9106 Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 www.analog.com ADV7280/ADV7281/ADV7282/ADV7283 Functionality and Features OVERVIEW This user guide provides a detailed description of the The AGC and clamp-restore circuitry allow an input video signal functionality and features of the ADV7280, ADV7280-M, peak-to-peak range to 1.0 V at the analog video input pin of the ADV7281, ADV7281-M, ADV7281-MA, ADV7282, ADV728x. Alternatively, these can be bypassed for manual ADV7282-M, and ADV7283 video decoders. Table 1 list the settings. shorthand notations used for these decoders in this user guide. AC coupling of the input video signals provides STB protection. The ADV7280, ADV7280-M, ADV7281, ADV7281-M, On the ADV7281, ADV7281-M, ADV7282, and ADV7282-M ADV7281-MA, ADV7282, ADV7282-M, and ADV7283 models, short-to-battery (STB) diagnostics can be carried out on automatically detect and convert standard composite analog two input video signals. baseband video signals compatible with worldwide NTSC, PAL, The ADV728x is programmed via a two-wire, serial, and SECAM standards. These video recorders accept composite 2 bidirectional port (I C compatible). The ADV728x supports a video signals (CVBS) as well as S-Video (YC) and YPbPr video number of functions including 8-bit to 6-bit down dither mode signals, supporting a wide range of consumer and automotive video and adaptive contrast enhancement (ACE). sources. The ADV7281, ADV7281-M, ADV7281-MA, The advanced interlaced-to-progressive (I2P) function allows ADV7282, ADV7282-M, and ADV7283 models can also accept the ADV7280, ADV7280-M, ADV7282, ADV7282-M, and pseudo differential and true differential CVBS inputs. ADV7283 to convert an interlaced video input into a The ADV728x-T models (ADV7280, ADV7281, ADV7282, and progressive video output. This function is performed without ADV7283) convert the analog video inputs into a YCrCb 4:2:2 the need for external memory. Edge adaptive technology is used component video data stream that is compatible with the 8-bit to minimize video defects on low angle lines. ITU-R BT.656 interface standard. The ADV728x is fabricated in a 1.8 V CMOS process. Its The ADV728x-M models (ADV7280-M, ADV7281-M, monolithic CMOS construction ensures greater functionality ADV7281-MA, and ADV7282-M) convert the analog video with lower power dissipation. The ADV728x are available in inputs into an 8-bit YcrCb 4:2:2 video stream, and that is output 40C to +85C temperature range models. This makes the over an MIPI CSI-2 interface. This MIPI CSI-2 output interface ADV728x ideal for automotive applications. connects to a wide range of video processors and FPGAs. See Table 6 for a descriptive list of these video decoder models. Rev. A Page 1 of 104 UG-637 ADV7280/ADV7281/ADV7282/ADV7283 Hardware Reference Manual TABLE OF CONTENTS Overview ............................................................................................ 1 Identification ............................................................................... 28 Revision History ............................................................................... 3 Status 1 ......................................................................................... 28 Using this Hardware Reference Guide ........................................... 4 Status 2 ......................................................................................... 28 Generic Shorthand Notations ..................................................... 4 Status 3 ......................................................................................... 28 Number Notations ........................................................................ 4 Autodetection Result ................................................................. 29 Register Access Conventions ...................................................... 4 Video Processor .............................................................................. 30 Acronyms and Abbreviations ..................................................... 4 SD Luma Path ............................................................................. 30 Field Function Descriptions........................................................ 5 SD Chroma Path ......................................................................... 30 Video Decoder Models .................................................................... 6 ACE, I2P, and Dither Processing Blocks ................................. 30 Video Input Pins Column ........................................................... 7 Sync Processing .......................................................................... 31 Differential AFE Column ............................................................ 7 VBI Data Recovery ..................................................................... 31 Output Format Column .............................................................. 7 General Setup .............................................................................. 31 Diagnostic Pins Column ............................................................. 7 Color Controls ............................................................................ 34 GPO Pins Column ........................................................................ 7 Free-Run Operation ................................................................... 35 Sync Output Pins Column .......................................................... 7 Clamp Operation ........................................................................ 36 ACE Column ................................................................................. 7 Luma Filter .................................................................................. 37 I2P Column ................................................................................... 7 Chroma Filter .............................................................................. 40 Package Column ........................................................................... 7 Gain Operation ........................................................................... 41 Functional Block Diagrams ......................................................... 8 Chroma Transient Improvement (CTI) .................................. 44 General Description ....................................................................... 11 Digital Noise Reduction (DNR) and Luma Peaking Filter ... 45 Overview of Analog Front End ................................................ 11 Comb Filters ................................................................................ 46 Overview of Standard Definition Processor ........................... 11 IF Filter Compensation ............................................................. 48 Input Networks ............................................................................... 12 Adaptive Contrast Enhancement (ACE) ................................. 49 Single-Ended Input Network .................................................... 12 Dither Function .......................................................................... 50 Differential Input Network ....................................................... 12 I2P Function ............................................................................... 50 Short-to-Battery Protection ...................................................... 13 Output Video Format..................................................................... 51 Short-to-Battery (STB) Diagnostics ............................................. 14 Swap Color output ...................................................................... 51 Programming Diagnostic Slice Levels ..................................... 15 Output Format Control ............................................................. 51 Programming Diagnostic Interrupt ......................................... 16 ITU-R BT.656 Output .................................................................... 52 Programming Hardware Interrupt ............................ 17 ITU-R BT.656 Output Control Registers ................................ 53 INTRQ MIPI CSI-2 Tx Output ................................................................... 55 Analog Front End ........................................................................... 18 Ultralow Power State .................................................................. 55 Input Configuration ................................................................... 18 2 I C Port Description ....................................................................... 57 Manual Muxing Mode ............................................................... 21 Register Maps .............................................................................. 59 Antialiasing Filters .......................................................................... 25 PCB Layout Recommendations .................................................... 61 Antialiasing Filter Configuration ............................................. 25 Analog Interface Inputs ............................................................. 61 Global Control Registers ............................................................... 26 Power Supply Decoupling ......................................................... 61 Power Saving Mode and Reset Control ................................... 26 VREFN and VREFP Pins .......................................................... 61 Global Pin Control ..................................................................... 26 Digital Outputs ........................................................................... 61 General-Purpose Output Controls .......................................... 27 Exposed Metal Pad ..................................................................... 61 Global Status Register .................................................................... 28 Rev. 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