Circuit Note CN-0290 Devices Connected/Referenced ADF4106 PLL Frequency Synthesizer Circuits from the Lab reference circuits are engineered and ADCLK905 ECL 1:1 Clock Buffer tested for quick and easy system integration to help solve todays analog, mixed-signal, and RF design challenges. For more ADCLK925 ECL 1:2 Clock Buffer information and/or support, visit www.analog.com/CN0290. ADP150 3.3 V Low noise Linear Regulator ADP7102 5 V Low noise Linear Regulator Extending the Low Frequency Range of a High Performance Phase Locked Loop CIRCUIT FUNCTION AND BENEFITS EVALUATION AND DESIGN SUPPORT Circuit Evaluation Boards The circuit shown in Figure 1 is a high performance phase CN-0290 Circuit Evaluation Board (EVAL-CN0290-SDPZ) locked loop (PLL) that uses high speed clock buffers and low System Demonstration Platform (EVAL-SDP-CS1Z) noise LDOs to maintain low phase noise even at low reference Design and Integration Files and RF frequencies. Schematics, Layout Files, Bill of Materials 5.5V VCC ADP150 ADP150 ADP7102 V CC ADCLK905 3.3V 3.3V 5V V T VCC V REF AV DV DD DD D Q LOOP FILTER VCXO D Q REFIN CP REF IN 100MHz LPF V EE ADF4106 VCC PLL V Q2 CC RF A IN ADCLK925 RF B IN D SPI Q2 INTERFACE D Q1 AGND DGND CPGND V REF V Q1 V T EE RFOUT Figure 1. Block Diagram of the EVAL-CN0290-SDPZ. Simplified Schematic: All Connections and Decoupling not Shown Rev. 0 Circuits from the Lab circuits from Analog Devices have been designed and built by Analog Devices engineers. Standard engineering practices have been employed in the design and construction of each circuit, and their function and performance have been tested and verified in a lab environment at room temperature. However, you are solely responsible for testing the circuit and determining its One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. suitability and applicability for your use and application. Accordingly, in no event shall Analog Devices Tel: 781.329.4700 www.analog.com be liable for direct, indirect, special, incidental, consequential or punitive damages due to any cause Fax: 781.461.3113 2013 Analog Devices, Inc. All rights reserved. whatsoever connected to the use of any Circuits from the Lab circuits. (Continued on last page) 10948-001CN-0290 Circuit Note For example, the minimum reference frequency and the RF local oscillator function. A complete phase-locked loop (PLL) is input frequency of a number of Analog Devices PLLs, such as realized when the synthesizer is used with an external loop filter the ADF4106, are specified for 20 MHz and 500 MHz, and voltage controlled oscillator (VCO). respectively. The frequency range can be lowered to a 10 MHz The ADF4106 is an integer-N PLL where the channel step size reference frequency and a 100 MHz RF input using the is an integer number N. This device has an RF frequency output additional clock buffers as in Figure 1. range up to 6 GHz, is easy to use, and is specified for low phase noise, typically 223 dBc/Hz (normalized phase noise floor ). CIRCUIT DESCRIPTION Figure.1 shows the block diagram, and Figure 2 shows the The ADF4106 frequency synthesizer can be used to implement simplified schematic of a complete phase locked loop using the the local oscillator function in the up-conversion and down- ADF4106 in a low noise single frequency clock application. conversion sections of RF receivers, transmitters, signal analyzers, data generators, or any RF application that requires a RFOUT J2 U5 VDD VP ADCLK925BCPZ VCC VCC C41 U7 Y1 10nF AV DV VP VDD DD DD R24 ADCLK905BCPZ VCXO-CVSS-945-X-100 C35 C36 VCC VCC 30 V V 10nF 10nF CE +5V CC CC VREF Q1 T7 C17 V VT Q1 REF R3 VCC 10nF C29 91k R30 V R32 R36 T Q2 J5 10nF CP VIN RFOUT D 30 150 51 C3 C8 D Q C9 D Q2 U1 680pF 10nF GND R7 R16 330pF C19 D Q ADF4106BRUZ VEE VEE 150 150 C39 10nF V V C30 EE EE C26 0.1F R2 10nF 1nF REFIN 43 AGND R12 R37 5. 1k 51 R23 R46 RSET 150 51 C16 R10 10nF 30 RFINA T8 CLK SDP BOARD AND MUXOUT DATA R8 R9 SUPPORT C18 R17 150 150 CIRCUITS 10nF 30 LE RFINB CPGND AGND DGND Figure 2. Simplified Schematic of Low Phase Noise Phase Locked Loop with Clock Buffers for Reference Frequency and RF Frequency Inputs of ADF4106 Rev. 0 Page 2 of 7 10948-002