Circuit Note CN-0296 Devices Connected/Referenced Circuits from the Lab reference circuits are engineered and SigmaDSP Stereo, Low Power, 96 kHz, tested for quick and easy system integration to help solve todays ADAU1761 24-Bit Audio Codec with Integrated PLL analog, mixed-signal, and RF design challenges. For more Digital Input Stereo, 2 W, Class-D Audio information and/or support, visit www.analog.com/CN0296. SSM2518 Power Amplifier Low Cost, High Performance Sound Bar System The SSM2518 is a digital input class-D audio power amplifier EVALUATION AND DESIGN SUPPORT that can output two channels of audio with a continuous power Circuit Evaluation Boards of 2 watts each into a 4 load. The channel-mapping feature of CN-0296 Circuit Evaluation Board (EVAL-CN0296-SDPZ) the SSM2518 allows it to select the specific channel to output System Demonstration Platform (EVAL-SDP-CB1Z) among those that are available in the interface. This makes it Design and Integration Files ideal for surround sound applications. Schematics, Layout Files, Bill of Materials CIRCUIT DESCRIPTION CIRCUIT FUNCTION AND BENEFITS The circuit has two main blocks. First is the audio input and The circuit shown in Figure 1 is a low cost, high performance processing block, which is made of the ADAU1761. Second is sound bar system that can accept an analog stereo audio signal the output amplifier stage, which is composed of the SSM2518. as an input and can output up to eight channels of audio with Audio Input and Processing discrete processing on each channel. The circuit is ideal for small docking stations and portable media devices. The circuit The input path of the ADAU1761 can accept two channels of offers low power consumption and high efficiency operation single ended or differential audio simultaneously. The inputs are without sacrificing audio quality. The circuit is also capable of sent to the DSP core of the ADAU1761 for processing. Audio driving headphones without the need of additional components. signal path and processing algorithms are created using Analog Devices SigmaStudio software. The built-in libraries in The ADAU1761 is a low power, stereo audio codec with SigmaStudio allow different processing blocks to be added to integrated digital audio processing, also called SigmaDSP. It the signal flow. Once programmed, the different blocks, such as has two ADCs to accept two audio channels and can apply volume control, equalizers and filters, are fully user- digital processing with the integrated SigmaDSP core. controllable. The software speeds development time allowing SigmaDSP processors are optimized for audio applications and designers to quickly test and debug their algorithms and programmed using SigmaStudio development software for ease configurations in an easy-to-use graphical interface. of use and faster development. The output of the ADAU1761 Class-D Output Amplifier can send up to eight channels of digital audio data to the output amplifiers using the serial interface. The ADAU1761 allows The SSM2518 class-D audio power amplifier receives the serial different audio signal processing in each channel, such as volume data, performs the digital-to-analog conversion, and drives the control, custom equalization, filtering, and spatialization effects loudspeakers. Each SSM2518 is capable of driving two channels tuned to the specific speaker configuration. The ADAU1761 with a continuous power of 2 watts each into 4-ohm speakers. processes and converts analog audio to digital format and drives The circuit makes use of four SSM2518s and can output eight the SSM2518 power amplifier. channels of audio. The channel mapping feature allows each SSM2518 to output two channels from the interface. With this feature, each SSM2518 can output different channels. Rev. 0 Circuits from the Lab circuits from Analog Devices have been designed and built by Analog Devices engineers. Standard engineering practices have been employed in the design and construction of each circuit, and their function and performance have been tested and verified in a lab environment at room temperature. However, you are solely responsible for testing the circuit and determining its One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. suitability and applicability for your use and application. Accordingly, in no event shall Analog Devices Tel: 781.329.4700 www.analog.com be liable for direct, indirect, special, incidental, consequential or punitive damages due to any cause whatsoever connected to the use of any Circuits from the Lab circuits. (Continued on last page) Fax: 781.461.3113 2013 Analog Devices, Inc. All rights reserved. CN-0296 Circuit Note SSM2518 MCLK OUTL+ BCLK OUTL LRCLK OUTR+ SDATA OUTR ADDR EVAL-SDP-CB1Z SDA SCL SDA1 SCL1 SSM2518 GPIO0 MCLK OUTL+ GPIO1 BCLK OUTL GPIO2 LRCLK OUTR+ GPIO3 SDATA OUTR ADDR SDA SCL ADAU1761 3.5mm JACK LAUX SSM2518 RAUX MCLK OUTL+ BCLK BCLK OUTL LRCLK LRCLK OUTR+ 12.288MHz ADC SDATA SDATA OUTR OSCILLATOR MCLK ADDR SDA SCL SDA SCL SSM2518 MCLK OUTL+ BCLK OUTL LRCLK OUTR+ SDATA OUTR ADDR SDA SCL Figure 1. Sound Bar System Using ADAU1761 and SSM2518 (Simplified Schematic: All Connections and Decoupling Not Shown) 2 I C Access and Configuration Registers and SSM2518 must be taken into account to maintain clock and signal integrity. Buffers may be needed to avoid loading effects. The ADAU1761 and SSM2518 both have internal registers that 2 need to be configured for proper operation. A microcontroller The serial data signals can be configured as I S, TDM-4, or 2 or a host configures the registers of the devices using the I C TDM-8 to carry two, four, or eight audio channels in each audio interface. The SSM2518 has an address pin that allows only two frame, respectively. 2 devices to have a unique address on the I C bus. The four Output Noise Voltage and Signal-to-Noise Ratio SSM2518 devices are configured by driving the ADDR pin of Performance the one device HIGH while keeping the other three at a LOW To measure output noise voltage, connect the inputs to ground level or keeping one LOW while the others are HIGH. The or terminate them with the proper impedance, and measure the device with the unique address can now communicate with the output voltage at the amplifier outputs. The voltage measurement is bus and be configured. The process is repeated for the other done over a bandwidth of 22 Hz to 22 kHz with an A-weighting three devices. The address control can performed by a system filter. The average noise measured on all eight channels is 66 V controller that controls the logic level of the address pins. rms. The signal-to-noise ratio referenced to a 2 W output and a Serial Data Interface 4 load is greater than 90 dB for all channels. 2 The serial data interface transmits audio using I S or TDM Output Power and Distortion Performance compatible data streams. The signals that are transmitted are Output power and THN+N is measured by applying a pure tone the bit clock (BCLK), frame clock (LRCLK), and the data (SDATA). as an input and taking measurements at the output of the The ADAU1761 is configured as the master, making it the source amplifiers using an audio analyzer. Using a 1 kHz sine wave as of the BCLK, LRCLK and SDATA sent to the SSM2518. For the input, the circuit provides good performance by having a proper operation, the devices must have synchronized master less than 1% THD+N at the rated output power of 2 W as clocks, MCLK. Typically, a 12.288 MHz crystal oscillator is used shown in Figure 2. as the master clock. The on-chip frequency multiplier/divider of the ADAU1761 and SSM2518 can generate their required internal clocks. Special layout precautions must be observed with the clock and signal lines. The input capacitance of the ADAU1761 Rev. 0 Page 2 of 4 10990-001