Circuit Note CN-0363 Devices Connected/Referenced 24-Bit, 250 kSPS, Sigma-Delta ADC with 20 s AD7175-2 Settling and True Rail-to-Rail Buffers ADA4528-1 Precision, Ultralow Noise, RRIO, Zero-Drift Op Amp Precision, 20 MHz, CMOS, Rail-to-Rail AD8615 Input/Output Operational Amplifier Circuits from the Lab reference designs are engineered and tested for quick and easy system integration to AD5201 33-Position Digital Potentiometer help solve todays analog, mixed-signal, and RF design 0.2 V/C Offset Drift, 105 MHz Low Power, challenges. For more information and/or support, visit ADA4805-1 Low Noise, Rail-to-Rail Op Amp www.analog.com/CN0363. ADG633 CMOS, 5 V/+5 V/+3 V, Triple SPDT Switch ADG733 CMOS, 2.5 V Low Voltage, Triple SPDT Switch ADG704 CMOS, Low Voltage, 4 , 4-Channel Multiplexer ADG819 0.5 , CMOS,1.8 V to 5.5 V, 2:1 Mux/SPDT Switch Dual-Channel Colorimeter with Programmable Gain Transimpedance Amplifiers and Digital Synchronous Detection By using modulated light and digital synchronous detection EVALUATION AND DESIGN SUPPORT rather than a constant (dc) source, the system strongly rejects Circuit Evaluation Boards any noise sources at frequencies other than the modulation CN-0363 Circuit Evaluation Board (EVAL-CN0363-PMDZ) frequency, providing excellent accuracy. Design and Integration Files Schematics, Layout Files, Bill of Materials The dual-channel circuit measures the ratio of light absorbed by the liquids in the sample and reference containers at three CIRCUIT FUNCTION AND BENEFITS different wavelengths. This measurement forms the basis of The circuit shown in Figure 1 is a dual-channel colorimeter many chemical analysis and environmental monitoring featuring a modulated light source transmitter, programmable instruments used to measure concentrations and characterize gain transimpedance amplifiers on each channel, and a very materials through absorption spectroscopy. low noise, 24-bit - analog-to-digital converter (ADC). The output of the ADC connects to a standard FPGA mezzanine card. The FPGA takes the sampled data from the ADC and implements a synchronous detection algorithm. Rev. 0 Circuits from the Lab reference designs from Analog Devices have been designed and built by Analog Devices engineers. Standard engineering practices have been employed in the design and construction of each circuit, and their function and performance have been tested and verified in a lab environment at room temperature. However, you are solely responsible for testing the circuit and One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. determining its suitability and applicability for your use and application. Accordingly, in no event shall Tel: 781.329.4700 www.analog.com Analog Devices be liable for direct, indirect, special, incidental, consequential or punitive damages due Fax: 781.461.3113 2015 Analog Devices, Inc. All rights reserved. to any cause whatsoever connected to the use of any Circuits from the Lab circuits. (Continued on last page) CN-0363 Circuit Note 270pF 33k 8.2pF 1M 2.5V REF U1 U3-C U3-A 3.3V AVDD 1/3 ADG633 1/3 ADG633 2.2k AD7175-2 470pF IOVDD 2.2F 1k V REF P U2 AIN0 IOVDD ADA4528-1 4.7nF 2.2F 0.1F 1k V REF N 0.1VREF AIN1 DGND S1336-44BK 5.0V AVDD GAIN0 470pF 2.2k AVDD1 C67 V SAMPLE P 100k 1F AIN2 1F 1F AVDD2 2.5V REF 270pF V SAMPLE N AIN3 REGCAPD 33k REFERENCE REGCAPA 8.2pF AIN4 1F 1F 2.5V REF 2.5V REF 1M AVSS U7-A 0 AVDD U7-C REFOUT 1/3 ADG633 2.2k 470pF 2.2F GPIO1 1/3 ADG633 IOVDD 1k REF+ U6 1F 1F GPIO0 S1336-44BK ADA4528-1 4.7nF 10k 10k 2.2F 1k 0.1VREF REF SYNC/ERROR GAIN0 470pF CS AD CS 2.2k 1F 100k SCLK AD CLK SPLITTER XTAL1 DIN S1 AD DIN 2.5V REF NT31-414 XTAL2/CLKIO DOUT/RDY AD DOUT U10 AVDD 2.5V REF R72 ADG704 R45 WP154A4SUREQBFZGC AVDD 0.1VREF 100k 33 RED S1 D U9 ADA4805 100 24.3k GREEN S2 C18 C19 C44 0.1F 1F 10F 10F 1k 1F BLUE S3 S4 AVDD AVDD EN V DD 0.1F A0 GND IOVDD A1 AVDD U14 AD5201 2.5V REF 10k V DD AVDD A CS DA CS U4 VDRIVE AVDD SDI 100 W ADG819 33 CLK S2 IOVDD IOVDD Q3 AVDD ADA4805 U13 SHDN B MMBT2222A D 0.1F 0.1F EN 0.1F 10k VCC AD8615 V U11 SS GND S1 Y A GND U16 SN74LVC1G IN1 LED CLK 100 10k Figure 1. Dual-Channel Colorimeter with Programmable Gain Transimpedance Amplifiers and Lock-In Amplifiers (Simplified Schematic: All Connections and Decoupling Not Shown) component of the modulation signal. The result of these CIRCUIT DESCRIPTION operations are two low frequency demodulated signals A clock set to a user-programmable frequency modulates one of representing the in-phase and quadrature components of the the three LED colors with a constant current driver built around received light on each channel, respectively. A narrow FIR the AD8615 op amp, the ADG819 switch, and the AD5201 low pass filter removes all other frequency components, making digital potentiometer. The beam splitter sends half the light it easy to calculate the magnitude and phase shift of the amplitude through the sample container and half through the reference measured at the photodiodes, while rejecting any light or electrical container. The ADA4528-1, configured as a transimpedance noise at frequencies different from the LED clock. The ADG704 amplifier, then converts the photodiode current into an output multiplexer connects the power rail to one of the three LED voltage square wave, whose amplitude is proportional to the colors, allowing the user to select the test wavelength through a light transmitted through the sample or reference containers. 2-bit address. The AD8615 and an NPN transistor make up a The transimpedance amplifiers use the ADG633 single-pole, simple current source, with the LED current given by double-throw (SPDT) switches to select one of two transimpedance gains. The AD7175-2 - ADC samples the voltage and sends I V / R LED NON INVERTING EMITTER the digital data to an FPGA for digital demodulation. where: The FPGA implements synchronous demodulation by first VNON-INVERTING is the voltage at the non-inverting input of the synchronizing a numerically generated sine wave with the LED AD8615. clock, and then multiplying this sine wave with the sampled R is the value of the resistor connected to the emitter of EMITTER ADC data. In addition, a 90 shifted version of this sine wave is Transistor Q3. also multiplied with the ADC data to obtain the quadrature Rev. 0 Page 2 of 8 SAMPLE RDAC REG SPI 12568-001