Circuit Note CN-0393 Devices Connected/Referenced 16-Bit, 500 kSPS, Module Data ADAQ7988 Acquisition System 10 MHz, 20 V/s, G = 1, 2, 4, 8 iCMOS AD8251 Programmable Gain Instrumentation Amplifier PWM Controller and Transformer Driver ADuM3470 with Quad-Channel Isolators Circuits from the Lab reference designs are engineered and 3.75 kV, 6-Channel, SPIsolator Digital tested for quick and easy system integration to help solve todays ADuM3150 Isolator for SPI with Delay Clock analog, mixed-signal, and RF design challenges. For more information and/or support, visit www.analog.com/CN0393. Ultralow Noise, High Accuracy Voltage ADR4550 Reference (5 V) 20 V, 200 mA, Low Noise CMOS LDO ADP7118 Linear Regulator 28 V, 200 mA, Low Noise, Linear ADP7182 Regulator 650 kHz/1.3 MHz, 4 A, Step-Up, PWM, ADP1614 DC-to-DC Switching Converter Bank Isolated, 2-Channel, 16-Bit, 500 kSPS, Simultaneous Sampling Signal Chain Featuring Module Data Acquisition System driver to perform dc-to-dc conversion across the isolation EVALUATION AND DESIGN SUPPORT barrier. The system also includes many common features of a Circuit Evaluation Boards typical DAQ signal chain, including input circuit protection, CN-0393 Circuit Evaluation Board (EVAL-CN0393-FMCZ) programmable gain channels, high accuracy, and high System Demonstration Platform (EVAL-SDP-CH1Z) performance. Design and Integration Files Schematics, Layout Files, Bill of Materials The simultaneous sampling realizes multiple channels without sample rate limitations inherent in multiplexed DAQ signal CIRCUIT FUNCTION AND BENEFITS chains. The analog front end (AFE) design is also simpler than The circuit in Figure 1 is a two-channel, bank isolated, wide the multiplexed option, because the settling performance bandwidth data acquisition (DAQ) system, implemented with a requirements of the system are less demanding. Sampling simultaneous sampling architecture using an analog-to-digital occurs simultaneously for each channel, while sequential converter (ADC) per channel. The system achieves high sampling systems have delays between channels. channel density along with isolation between the bank and the Digital bank isolated DAQ designs provide protection for digital digital backplane, all while delivering exceptional performance. back end circuitry and reduce ground loop and common-mode The design also makes efficient use of isolation channels by interference between banks. They feature multiple DAQ signal configuring the ADCs in daisy-chain mode and utilizing an chains per ground plane, and can be implemented with fewer isolator product with a trimmed delay clock feature. Power digital isolation devices than channel-to-channel isolated generation is also simplified using an isolator with an integrated systems. pulse width modulation (PWM) controller and transformer Rev. A Circuits from the Lab reference designs from Analog Devices have been designed and built by Analog Devices engineers. Standard engineering practices have been employed in the design and construction of each circuit, and their function and performance have been tested and verified in a lab environment at room temperature. However, you are solely responsible for testing the circuit and One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. determining its suitability and applicability for your use and application. Accordingly, in no event shall Tel: 781.329.4700 www.analog.com Analog Devices be liable for direct, indirect, special, incidental, consequential or punitive damages due Fax: 781.461.3113 2017 Analog Devices, Inc. All rights reserved. to any cause whatsoever connected to the use of any Circuits from the Lab circuits. (Continued on last page) CN-0393 Circuit Note +ISO +15V +15V +7.5V +7.5V +5V VIN VOUT VIN VOUT VIN VOUT 100k 25k ADP7118 ADP7118 ADP7118 +ISO +16.5V TRANSFORMER ADJ ADJ ADJ 49.9k 49.9k 100k GND SCHOTTKY GND GND +1.25V DIODE FULL WAVE 8. 2k RECTIFIER ISO 15V 15V 2.5V V REF +7.5V VIN VOUT VIN VOUT V V ISO IN OUT 5V 150k ADP7182 ADP7182 ADR4550 ADJ GND 13.3k GND +7.5V +5V GND V+ VDD ADAQ7988 V X1 (A) REG +15V FB X2 V LDO REF REF G1A 10F 2.2F V +3.3V VIO DD1 1. 5k G0A 1k CA+ IN+ A1 20 A0 G1A V V SDI OA IA IN G0A V V AD8251 SCK OB IB PGIA ADC 2k (A) V V GAIN CNV G1B OC IC 500 1.8nF CA AMP OUT V V ID OD G0B SDO V GND ADCN GND GND 1 2 15V ADuM3470 2.5V SDP-H1 +7.5V +5V (FMC) V+ VDD ADAQ7988 +5V V V +3.3V (B) DD2 DD1 +15V V LDO REF REF G1B 10F 2.2F DCLK VIO 1. 5k G0B 1k CB+ IN+ A1 20 A0 SDI SI MO IN SPI SCK SCLK MCLK AD8251 ADC 2k (B) CNV 500 MSS 1.8nF SSS CB AMP OUT SDO SO MI V GND ADCN GND GND 1 2 15V 2.5V ADuM3150 SECONDARY PRIMARY SIDE SIDE Figure 1. CN-0393 Simplified Schematic Diagram The integrated ADC drivers of the ADAQ7988 are configured CIRCUIT DESCRIPTION to accept industrial-level signals of up to 10 V using external The system in Figure 1 has two bank isolated, simultaneous matched resistor networks. Each channel features an AD8251 sampling, data acquisition channels, each utilizing the ADAQ7988, programmable gain instrumentation amplifier (PGIA) that a 16-bit, 500 kSPS, Module data acquisition system. The provides a high impedance input, and allows channel gain options ADAQ7988 provides exceptional performance while reducing compatible with input ranges of 10 V, 5 V, 2.5 V, and 1.25 V. board area and simplifying many design challenges associated The gain settings of the AD8251 devices and the digital interfaces with data acquisition signal chains. of the ADAQ7988 devices are connected to the ADuM3470 and The ADuM3470 and ADuM3150 digital isolators separate the ADuM3150 isolators, respectively. The ADuM3470 also provides two power planes of the circuit in Figure 1. The two power power to the data acquisition channel components via its integrated planes are referred to as the primary (or digital) and secondary PWM controller and transformer driver. The ADuM3150 allows (or data acquisition) side. The digital host (master) connects to efficient use of high-speed isolation channels at high data rates the primary side through an FMC connector. The primary side using its delay clock feature. When used with the ADAQ7988 encompasses the digital signals going to and from the digital daisy-chain mode, the ADuM3150 delay clock output allows for host. The secondary side features the data acquisition signal serial clock rates up to 40 MHz using only three digital isolation chain, power regulators, reference circuitry, and the ADAQ7988 channels. digital interface signals. Rev. A Page 2 of 15 15707-001