Circuit Note CN-0507 Devices Connected/Referenced Microwave Wideband Synthesizer with ADF4355-3 Integrated VCO 400 MHz to 6 GHz Quadrature ADL5380 Demodulator Programmable Harmonic Low-Pass Filter, HMC1044 1 GHz to 3 GHz, 3 dB Bandwidth High Isolation, Silicon SPDT, Nonreflective HMC8038 Switch, 0.1 GHz to 6.0 GHz Circuits from the Lab reference designs are engineered and tested for quick and pHEMT Gain Block MMIC Amplifier, DC HMC788A easy system integration to help solve todays 10 GHz analog, mixed-signal, and RF design CMOS, Low Voltage, 3-Wire, Serially challenges. For more information and/or ADG739 Controlled, Dual-SP4T Switch support, visit www.analog.com/CN0507 Wide Supply Range, Dual, Rail-to-Rail, AD8426 Output Instrumentation Amplifier Precision, Micropower LDO Voltage ADR127 References in TSOT 800 mA Ultralow Noise, High PSRR, RF ADM7150 Linear Regulator 6.5 V, 2 A, Ultralow Noise, High PSRR, Fast ADM7172 Transient Response CMOS LDO A Complete Two-Port Vector Network Analyzer zero intermediate frequency (ZIF) architecture. The frequency EVALUATION AND DESIGN SUPPORT range of the circuit is from 1.7 GHz to 3.4 GHz, and the Circuit Evaluation Boards dynamic range is approximately 40 dB. 2-Port Network Analyzer Board (EVAL-CN0507-ARDZ) Ultra low power ARM Cortex-M3 Arduino Form Factor Directional couplers and in-phase-quadrature (IQ) Development Platform (EVAL-ADICUP3029) demodulators sense the forward and reverse phase and Design and Integration Files amplitude. Because of the zero IF architecture, the IQ Schematics, Layout Files, Bill of Materials, Software demodulator outputs are at dc and can be sampled directly by a precision analog-to-digital converter (ADC) integrated into a CIRCUIT FUNCTION AND BENEFITS microcontroller. Vector network analysis is a technique to measure the phase A major advantage of the reference design is the use of the ZIF shift and attenuation of signals as they propagate through a architecture, where use of a lower speed ADC reduces cost and medium or are reflected by the medium. This technique is most avoids the design complexity associated with high speed commonly used to measure the gain, reflection coefficient, and sampling converters. This architecture enables the CN-0507 reverse isolation of electronic circuits, such as RF amplifiers and board to be compatible with low cost Arduino form factor filters, but can also be expanded to analyze characteristics of a boards and provides users with an alternative to bulky, material, such as its moisture content. expensive benchtop lab equipment that can cost thousands of The reference design shown in Figure 1 implements a complete dollars. The compact size of the reference design makes it ideal two-port radio frequency (RF) vector network analyzer using a for a wide range of test and measurement applications. Rev. 0 Circuits from the Lab circuits from Analog Devices have been designed and built by Analog Devices engineers. Standard engineering practices have been employed in the design and construction of each circuit, and their function and performance have been tested and verified in a lab environment at room temperature. However, you are solely responsible for testing the circuit and determining its suitability One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. and applicability for your use and application. Accordingly, in no event shall Analog Devices be liable for Tel: 781.329.4700 www.analog.com direct, indirect, special, incidental, consequential or punitive damages due to any cause whatsoever Fax: 781.461.3113 2020 Analog Devices, Inc. All rights reserved. connected to the use of any Circuits from the Lab circuits. (Continued on last page) CN-0507 Circuit Note TO ANALOG MUX I2R Q2R HMC8038 SPDT HMC8038 IQ DMOD SPDT ADL55380 50 122.88MHz 50 EXT PORT2 REF HMC1044 PROGRAMMABLE LPF RFOUT A 50 50 IQ DMOD ADL55380 I2F Q2F DUT OR TO ANALOG MUX MUT TO ANALOG MUX ADF4355 PLL WITH I1R Q1R INTEGRATED IQ DMOD VCO ADL55380 HMC788 GAIN PORT 1 HMC1044 BLOCK PROGRAMMABLE LPF 1-TO-4 RFOUT B POWER SPLITTER IQ DMOD ADL55380 I1F Q1F ANALOG MUX I TO ANALOG MUX ADG739 I1F IN AMP TO AIN CONNECTOR AD8426 (ADICUP3029) I1R I2F I2R ANALOG MUX Q V REF ADG739 ADR127 Q1F IN AMP AD8426 Q1R VQ Q2F Q2R Figure 1. Simplified block Diagram of EVAL-CN0507-ARDZ CIRCUIT DESCRIPTION b 1 S = , the forward reflection 11 a Analysis of a Linear Network 1 b At RF, analysis of a linear network is executed using power 2 S = , the forward gain 21 waves, which can be related to the traveling voltage and current a 1 wave phasors. The scattering, or S-parameters, are the most b 1 S = , the reverse isolation 12 common quantities to describe the electrical behavior of the a 2 network at high frequencies. The term, scattering, refers to the b 2 S = , the reverse reflection way the electromagnetic (EM) wave is affected as the wave 22 a 2 passes a discontinuity. A vector network analyzer measures the voltage wave phasors a b 1 2 and computes the S-parameters PORT 1 PORT 2 b a 1 2 Traditional Network Analyzer Architecture Figure 3 shows the architecture of a traditional network analyzer, Figure 2. S-Parameters configured to measure dual-port S-parameters. Phase-Locked Figure 2 shows a two-port network with four traveling voltage Loop 1 (PLL1) drives a sine wave into one of the two ports of wave phasors that are defined as follows: the network, while the other port is internally terminated to 50 . The device under test (DUT) or material under test a1 is the incident wave at Port 1 (MUT) is generally connected between the RF ports (a MUT b1 is the reflected wave at Port 1 sample is placed between two antennae connected to the two a2 is the incident wave at Port 2 ports). b2 is the reflected wave at Port 2 The four S-parameters of the network are defined as Rev. 0 Page 2 of 13 23361-002 23361-001