2 2 W, Filterless, Stereo, Class-D 2 Audio Amplifier with ALC and I C SSM2380 The SSM2380 features a high efficiency, low noise modulation FEATURES scheme that requires no external LC output filters. The modulation Filterless, stereo, Class-D amplifier with - modulation continues to provide high efficiency even at low output power. 2 W into 4 load and 1.4 W into 8 load at 5.0 V supply The SSM2380 operates with 93% efficiency at 1.4 W into 8 with <1% total harmonic distortion plus noise (THD + N) or with 85% efficiency at 2 W into 4 from a 5.0 V supply and 2 Highly configurable I C interface for gain adjust, automatic has an SNR of >100 dB. level control (ALC), and ultralow EMI emissions mode 2 MODE pin can disable I C interface for more traditional Spread-spectrum pulse density modulation is used to provide stereo amplifier configuration lower EMI-radiated emissions compared with other Class-D 2 Stereo-to-mono mixer option via I C control architectures. An added benefit of spread-spectrum - modu- 93% efficiency at 5.0 V, 1.4 W into 8 speaker lation is that no synchronization (SYNC) is needed when using Signal-to-noise ratio (SNR): >100 dB multiple Class-D amplifiers. For applications that require long Single-supply operation from 2.5 V to 5.5 V speaker cables (>10 cm), the SSM2380 includes a user-selectable Ultralow shutdown current: 20 nA ultralow EMI emissions mode that eliminates the need for EMI Short-circuit and thermal protection filters at the Class-D outputs. Pop-and-click suppression The SSM2380 has a micropower shutdown mode with a typical Available in 16-ball, 2.0 mm 2.0 mm WLCSP shutdown current of 20 nA. Shutdown is enabled by applying a logic low to the SD pin or through an optional independent APPLICATIONS 2 channel soft shutdown via I C. Mobile phones MP3 players The device also includes pop-and-click suppression circuitry. Portable electronics This suppression circuitry minimizes voltage glitches at the output during turn-on and turn-off, reducing audible noise GENERAL DESCRIPTION on activation and deactivation. The SSM2380 is a fully integrated, high efficiency, stereo, Class-D The fully differential inputs of the SSM2380 provide excellent audio amplifier. It is designed to maximize performance for mobile rejection of common-mode noise on the input. Input coupling phone applications. The application circuit requires a minimum capacitors can be omitted if the dc input common-mode voltage of external components and operates from a single 2.5 V to 5.5 V is approximately VDD/2. supply. It is capable of delivering 2 W of continuous output power with <1% THD + N driving a 4 load from a 5.0 V supply. The SSM2380 is specified over the commercial temperature 2 range of 40 C to +85 C. It has built-in thermal shutdown The SSM2380 features a highly flexible I C interface with many 2 and output short-circuit protection. It is available in a 16-ball, useful settings. Using the I C control interface, the gain of the 2 mm 2 mm wafer level chip scale package (WLCSP). SSM2380 can be selected from 1 dB to 24 dB (plus mute) in 47 steps with no external components. Other features accessed 2 from the I C interface include independent left/right channel shutdown, variable ultralow EMI emission control mode, auto- matic level control (ALC) for high quality speaker protection, and stereo-to-mono mixing operation. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. 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SSM2380 TABLE OF CONTENTS Features .............................................................................................. 1 Mixer Mode................................................................................. 18 Applications....................................................................................... 1 Applications Information .............................................................. 19 General Description ......................................................................... 1 Layout .......................................................................................... 19 Revision History ............................................................................... 2 Input Capacitor Selection.......................................................... 19 Functional Block Diagram .............................................................. 3 Power Supply Decoupling ......................................................... 20 Specifications..................................................................................... 4 Typical Application Circuits ......................................................... 21 2 2 I C Timing Characteristics.......................................................... 5 I C Interface .................................................................................... 24 Absolute Maximum Ratings............................................................ 6 Register Map ................................................................................... 25 Thermal Resistance ...................................................................... 6 Register Map Details ...................................................................... 26 ESD Caution.................................................................................. 6 Register R0: Left Channel Gain Control, Address 0x00........ 26 Pin Configuration and Function Descriptions............................. 7 Register R1: Right Channel Gain Control, Address 0x01..... 26 Typical Performance Characteristics ............................................. 8 Register R2: Mode Control, Address 0x02.............................. 27 Theory of Operation ...................................................................... 14 Register R3: ALC Control 1, Address 0x03............................. 27 Overview...................................................................................... 14 Register R4: ALC Control 2, Address 0x04............................. 28 Pop-and-Click Suppression....................................................... 14 Register R5: Shutdown, Address 0x05..................................... 29 Output Modulation Description .............................................. 14 Register R6: Error, Address 0x06.............................................. 29 Operating Modes........................................................................ 15 Register R7: Error Clear, Address 0x07 ................................... 29 ALC Mode Operation................................................................ 15 Register R8: Reset, Address 0x08 ............................................. 29 Gain Select Mode Operation .................................................... 16 Outline Dimensions....................................................................... 30 2 I C Control Mode Operation.................................................... 16 Ordering Guide .......................................................................... 30 Automatic Level Control (ALC)............................................... 16 REVISION HISTORY 2/11Rev. 0 to Rev. A Changes to Setting the ALC Threshold Voltage Section........... 15 10/10Revision 0: Initial Version Rev. A Page 2 of 32