PDM Digital Input, Mono 2.7 W Class-D Audio Amplifier Data Sheet SSM2537 architecture enables extremely low real-world power consumption FEATURES from digital audio sources with excellent audio performance. Using Filterless digital Class-D amplifier the SSM2537, audio can be transmitted digitally to the audio Pulse density modulation (PDM) digital input interface amplifier, significantly reducing the effect of noise sources such 2.7 W into 4 load and 1.4 W into 8 load at 5.0 V supply as GSM interference or other digital signals on the transmitted with <1% total harmonic distortion plus noise (THD + N) audio. The SSM2537 is capable of delivering 2.7 W of continu- Available in 9-ball, 1.2 mm 1.2 mm, 0.4 mm pitch WLCSP ous output power with <1% THD + N driving a 4 load from a 93% efficiency into 8 at full scale 5.0 V supply. Output noise: 25 V rms at 3.6 V, A-weighted THD + N: 0.005% at 1 kHz, 100 mW output power The SSM2537 features a high efficiency, low noise modulation PSRR: 80 dB at 217 Hz, with dither input scheme that requires no external LC output filters. The closed-loop, Quiescent power consumption: 5.1 mW three-level modulator design retains the benefits of an all-digital (VDD = 1.8 V, PVDD = 3.6 V, 8 + 33 H load) amplifier, yet enables very good PSRR and audio performance. The Pop-and-click suppression modulation continues to provide high efficiency even at low output Configurable with PDM pattern inputs power and has an SNR of 102 dB PDM input. Spread-spectrum Short-circuit and thermal protection with autorecovery pulse density modulation is used to provide lower EMI-radiated Smart power-down when PDM stop condition or no clock emissions compared with other Class-D architectures. input detected The SSM2537 has a four-state gain and sample frequency selection 64 f or 128 f operation supporting 3 MHz and 6 MHz clocks S S pin that can select two different gain settings, optimized for 3.6 V DC blocking high-pass filter and static input dc protection and 5 V operation. This same pin controls the internal digital fil- User-selectable ultralow EMI emissions and low latency modes tering and clocking, which can be set for a 64 f or 128 f input S S Power-on reset (POR) sample rate to support both 3 MHz and 6 MHz PDM clock rates. Minimal external passive components The SSM2537 has a micropower shutdown mode with a typical APPLICATIONS shutdown current of 1.6 A for both power supplies. Shutdown is Mobile handsets enabled automatically by gating input clock and data signals. A standby mode can be entered by applying a designated PDM stop GENERAL DESCRIPTION condition sequence. The device also includes pop-and-click sup- The SSM2537 is a PDM digital input Class-D power amplifier pression circuitry. This suppression circuitry minimizes voltage that offers higher performance than existing DAC plus Class-D glitches at the output when entering or leaving the low power solutions. The SSM2537 is ideal for power sensitive applications state, reducing audible noises on activation and deactivation. where system noise can corrupt the small analog signal sent to The SSM2537 is specified over the industrial temperature range the amplifier, such as mobile phones and portable media players. of 40 C to +85 C. It has built-in thermal shutdown and output The SSM2537 combines an audio digital-to-analog converter short-circuit protection. It is available in a 9-ball, 1.2 mm (DAC), a power amplifier, and a PDM digital interface on a single 1.2 mm wafer level chip scale package (WLCSP). chip. The integrated DAC plus analog sigma-delta (-) modulator FUNCTIONAL BLOCK DIAGRAM VDD PVDD PGND SSM2537 POWER-ON CLOCKING POWER RESET CONTROL PDAT OUT+ - INPUT FILTERING/ FULL-BRIDGE CLASS-D INTERFACE DAC POWER STAGE MODULATOR PCLK OUT GAIN FS LRSEL Figure 1. Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2012 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. 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Technical Support www.analog.com 10981-001SSM2537 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Master Clock ............................................................................... 13 Applications ....................................................................................... 1 Power Supplies ............................................................................ 13 General Description ......................................................................... 1 Power Control ............................................................................. 13 Functional Block Diagram .............................................................. 1 Power-On Reset/Voltage Supervisor ....................................... 13 Revision History ............................................................................... 2 System Gain/Input Frequency .................................................. 13 Specifications ..................................................................................... 3 PDM Pattern Control ................................................................ 14 Digital Input/Output Specifications........................................... 4 EMI Noise .................................................................................... 14 PDM Interface Digital Timing Specifications .......................... 5 PDM Channel Selection ............................................................ 14 Absolute Maximum Ratings ............................................................ 6 Output Modulation Description .............................................. 14 Thermal Resistance ...................................................................... 6 Applications Information .............................................................. 15 ESD Caution .................................................................................. 6 Layout .......................................................................................... 15 Pin Configuration and Function Descriptions ............................. 7 Power Supply Decoupling ......................................................... 15 Typical Performance Characteristics ............................................. 8 Outline Dimensions ....................................................................... 16 Theory of Operation ...................................................................... 13 Ordering Guide .......................................................................... 16 REVISION HISTORY 10/12Revision 0: Initial Version Rev. 0 Page 2 of 16