HMC1190ALP6NE v02.0120 BROADBAND HIGH IP3 DUAL CHANNEL DOWNCONVERTER w/ Fractional-N PLL & VCO, 0.7 - 3.8 GHz Typical Applications Features The HMC1190ALP6NE is Ideal for: Broadband Operation with no external matching High-side and Low-side LO injection Operation Multiband/Multi-standard Cellular BTS Diversity Receivers High Input IP3 of +24 dBm GSM & 3G & LTE/WiMAx /4G Power Conversion Gain of 8.9 dB MIMO Infrastructure Receivers Input P1dB of 11 dBm Wideband Radio Receivers SSB Noise Figure of 9 dB 55 dBc Channel-to-Channel Isolation Multiband Basestations & Repeaters Enable/Disable Mixer and PLLVCO independently Functional Diagram Single-ended RF input ports Maximum Phase Detector Rate: 100 MHz Low Phase Noise: -110 dBc/Hz in Band Typical PLL FOM: -230 dBc/Hz Integer Mode, -227 dBc/Hz Frac- tional Mode < 180 fs Integrated RMS Jitter (1 kHz to 20 MHz) LO Low Noise Floor: -165 dBc/Hz Mixer Low Noise Floor: -161 dBc/Hz Integrated VCO External VCO Input, differential LO output Exact Frequency Mode: 0 Hz Fractional Frequency Error Programmable RF Output Phase Output Phase Synchronous Frequency Changes Output Phase Synchronization LO Output Mute Function Compact Solution, 6x6 mm Leadless QFN Package General Description The HMC1190ALP6NE is a high linearity broadband dual channel downconverting mixer with integrated PLL and VCO optimized for multi-standard receiver applications that require a compact, low power design. Integrated wideband limiting LO amplifiers enable the HMC1190ALP6NE to achieve an unprecedented RF bandwidth of 700 MHz to 3800 MHz for applications including Cellular/3G, LTE/WiMAx /4G. Unlike conventional narrow-band downconverters, the HMC1190ALP6NE supports both high-side and low-side LO injection over all RF frequencies. The RF and LO input ports are internally matched to 50 Ohms. The HMC1190ALP6NE features an integrated LO and RF baluns, enable control of IF and LO amplifiers and bias control interface to high linearity passive mixer cores. Balanced passive mixer combined with high-linearity IF am- plifier architecture provides excellent LO-to-RF, LO-to-IF, and RF-to-IF isolations. Low noise figure of 9 dB, and high IIP3 of +24 dBm allow the HMC1190ALP6NE to be used in most demanding applications. External bias control pins enable optimization of already low power dissipation of 2.34 W (typical). Fast enable control interface reduces power consumption further in TDD applications. External VCO input allows the HMC1190ALP6NE to lock external VCOs, and enables cascaded LO architectures for MIMO applications. Two separate Charge Pump (CP) outputs enable separate loop filters optimized for both integrated and external VCOs, and seamless switching between integrated or external VCOs during operation. Programmable RF output phase features can further phase adjust and synchronize multiple HMC1190ALP6NEs enabling scalable MIMO and beam-forming radio architectures. Additional features include configurable LO output mute function, Exact Frequency Mode that enables the HMC1190ALP6NE to generate fractional frequencies with 0 Hz frequency error, and the ability to synchronously change frequencies without changing phase of the output signal that increases efficiency of digital pre-distortion loops. The HMC1190ALP6NE is housed in RoHS compliant compact 6x6 mm leadless QFN package. Information furnished by Analog Devices is believed to be accurate and reliable. However, no For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that may result from its use. Specifications subject to change without notice. No Phone: 781-329-4700 Order online at www.analog.com 1 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Application Support: Phone: 1-800-ANALOG-D TRANSCEIVERS - Rx RFIC SHMC1190ALP6NE v02.0120 BROADBAND HIGH IP3 DUAL CHANNEL DOWNCONVERTER w/ Fractional-N PLL & VCO, 0.7 - 3.8 GHz Table 1. Electrical Specifications 1 T = +25C, IF Frequency = 150 MHz, LO Power is set to 3 , RF Input Power = -5 dBm, A LOVDD=3VRVDD=DVDD3V=CHIPEN= 3.3V, VDDCP=VCS1=VCS2=VBIASIF1=VBIASIF2=LOBIAS1=LOBIAS2=VCC1=VCC2=VGATE1=VGATE2=5V unless otherwise noted. Parameter Typical Units Mixer Core RF Input Frequency 700 - 3800 MHz Range Mixer Core IF Output Frequency 50 - 350 MHz Range RF Frequency 900 1900 2200 2700 3500 3800 MHz 2 Side Band LSB USB LSB USB LSB USB LSB USB LSB USB LSB USB 3 4 4 4 4 Conversion Gain 9 8.9 8.3 8.5 7.9 8.1 7.1 7.6 6 6.2 4.7 4.7 dB IIP3 24.5 22.7 26.5 25.5 26.9 26.2 27.1 27.5 27 27.9 27.1 28.3 dB Noise Figure (SSB) 9.6 9.3 9.9 9.3 10.7 10.1 11.5 11 14 13.1 15.7 13.7 dB Input 1 dB Compression 10.6 10.4 12.3 11.8 12.8 12.2 13.9 13.2 15.7 14.7 17.3 16.3 dBm LO Leakage at RF Port -47.6 -44.8 -49.2 -49.5 -50.4 -48.8 -44.2 -50.1 -48.8 -48.7 -51.1 -48.1 dBm RF to IF Isolation 41.5 43.1 39.2 46.7 39.9 41.5 46.1 44.8 54.1 51 52 52.8 dBc 5 Channel to Channel Isolation 56.1 55.9 52.6 53.5 51.4 51 49.4 49.8 43.5 44 43.5 44.3 dBc +2RF-2LO Response 83 71.6 75.7 73.9 81.5 82.2 67.3 76.1 68.5 68 68.7 69.1 dBc +3RF-3LO Response 89 73 75.3 74.8 86.7 74.1 79.7 73.6 75.2 71.8 75.5 69.9 dBc 1 LO Power Level can be adjusted using Reg 16h 2 LSB stands for lower side band and refers to RF<LO. USB stands for upper side band and refers to RF>LO. 3 Balun losses at IF output ports are de-embedded. 4 VGATE1 = VGATE2 = 4.9V 5 RF1 input power= -5 dBm, measurement taken from IF2 output. RF2 and IF1 ports are terminated with 50 Ohms Table 2. DC Power Supply Specifications Parameter Min. Typ. Max. Units 4.8 5 5.2 V 5V Supply Rails (VDDCP, VCS1, VCS2, VDDLS, VBIASIF1, VBIASIF2, LOBIAS1, LOBIAS2, VCC1, VCC2) 1 2 200 330 556 mA 3.1 3.3 3.5 V 3.3V Supply Voltage (LOVDD, 3VRVDD, DVDD3V, VCCPD, VCCPS, VCCHF) 1 2 142 193 246 mA 3 VGATE1, VGATE2 VDDIF-0.2 5 VDDIF V 4 5V Supply Rails (VDDCP, VCS1, VCS2, VDDLS, VBIASIF1, VBIASIF2, LOBIAS1, LOBIAS2, VCC1, VCC2) 280.5 330 379.5 mA (5V) 4 3.3V Supply Voltage 164.05 193 221.95 mA (LOVDD, 3VRVDD, DVDD3V, VCCPD, VCCPS, VCCHF) (3.3V) 1 LO Frequency=2400 MHz, LO MIx is enabled in single ended mode, LO OUT is disabled. LO MI x power setting = 0, divide ratio = 1, divider stage high gain = 0 2 LO Frequency=2400 MHz, LO MIx and LO OUT are both enabled in differential mode. LO MI x and LO OUT power setting = 3, divide ratio = 62, divider stage high gain = 1 3 VGATE1 and VGATE2 are obtained through resistors which are connected to VDDIF 4 LO Frequency=2400 MHz, LO MIx is enabled in differential mode, LO OUT is disabled. LO MI x power setting = 3. When LO OUT is enabled in differential mode the bias current increases by 34 mA (Typ.). For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 Order online at www.analog.com 2 Application Support: Phone: 1-800-ANALOG-D TRANSCEIVERS - Rx RFIC S