21 GHz to 24 GHz, GaAs, MMIC, I/Q Upconverter Data Sheet HMC7912 FEATURES GENERAL DESCRIPTION Conversion gain: 15 dB typical The HMC7912 is a compact, gallium arsenide (GaAs), pseudo- Sideband rejection: 22 dBc typical morphic (pHEMT), monolithic microwave integrated circuit Input power for 1 dB compression (P1dB): 4 dBm typical (MMIC) upconverter in a RoHS compliant, low stress, injection Output third-order intercept (OIP3): 33 dBm typical molded plastic LFCSP package that operates from 21 GHz to 2 local oscillator (LO) leakage at RFOUT: 5 dBm typical 24 GHz. This device provides a small signal conversion gain of 2 LO leakage at the intermediate frequency (IF) input: 15 dB with 22 dBc of sideband rejection. The HMC7912 uses a 35 dBm typical variable gain amplifier preceded by an in-phase/quadrature (I/Q) RF return loss: 15 dB typical mixer that is driven by an active 2 LO multiplier. IF1 and IF2 LO return loss: 15 dB typical mixer inputs are provided, and an external 90 hybrid is needed to 32-lead, 5 mm 5 mm LFCSP package select the required sideband. The I/Q mixer topology reduces the need for filtering of the unwanted sideband. The HMC7912 APPLICATIONS is a much smaller alternative to hybrid style single sideband (SSB) Point to point and point to multipoint radios upconverter assemblies, and it eliminates the need for wire Military radars, electronic warfare (EW), and electronic bonding by allowing the use of surface-mount manufacturing intelligence (ELINT) techniques. Satellite communications Sensors FUNCTIONAL BLOCK DIAGRAM 32 31 30 29 28 27 26 25 1 24 V NIC GMIX 2 23 NIC NIC 3 22 V NIC DRF2 4 21 V NIC CTL1 HMC7912 NIC 5 20 V CTL2 GND 6 19 V DRF3 2 LOIN 7 18 V DRF4 8 17 GND NIC 9 10 11 12 13 14 15 16 EPAD Figure 1. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20162018 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com V NIC DLO1 V NIC DLO2 V IF2 REF V NIC DET GND IF1 RFOUT V ESD GND V GRF NIC V DRF1 13735-001HMC7912 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Leakage Performance ................................................................. 16 Applications ....................................................................................... 1 Return Loss Performance .......................................................... 17 General Description ......................................................................... 1 Power Detector Performance .................................................... 18 Functional Block Diagram .............................................................. 1 Spurious Performance ............................................................... 19 Revision History ............................................................................... 2 Theory of Operation ...................................................................... 20 Specifications ..................................................................................... 3 Applications Information .............................................................. 21 Absolute Maximum Ratings ............................................................ 4 Biasing Sequence ........................................................................ 21 Thermal Resistance ...................................................................... 4 Local Oscillator Nulling ............................................................ 21 ESD Caution .................................................................................. 4 Evaluation Printed Circuit Board............................................. 23 Pin Configuration and Function Descriptions ............................. 5 Outline Dimensions ....................................................................... 24 Interface Schematics..................................................................... 6 Ordering Guide .......................................................................... 24 Typical Performance Characteristics ............................................. 7 REVISION HISTORY 4/2018Rev. A to Rev. B Changes to Biasing Sequence Section .......................................... 21 Updated Outline Dimensions ....................................................... 24 Changes to Ordering Guide .......................................................... 24 6/2016Rev. 0 to Rev. A Change to the Local Oscillator (LO) Parameter and Output Third-Order Intercept (OIP3) at Maximum Gain Parameter, Table 1 ................................................................................................ 3 Changes to Figure 76, Figure 77, Figure 78, Figure 79, Figure 80, and Figure 81 ................................................................................... 18 4/2016Revision 0: Initial Version Rev. B Page 2 of 24