HMC847LC5 v06.1215 36 Gbps, 4:1 MUX WITH DUTY CYCLE CONTROL & PROGRAMMABLE OUTPUT VOLTAGE Typical Applications Features The HMC847LC5 is ideal for: Supports Data Rates up to 36 Gbps SONET OC-768 Half Rate Clock Input RF ATE Applications Quarter Rate Reference Clock Output Broadband Test & Measurements Fast Rise and Fall Times: 11 / 12 ps Serial Data Transmission up to 36 Gbps Programmable Differential Output Voltage Swing: 250 - 900 mVp-p High Speed DAC Interfacing Single Supply: +3.3V 2 32 Lead Ceramic 5x5 mm SMT Package: 25 mm Functional Diagram General Description The HMC847LC5 is a 4:1 multiplexer for operation at output data rate up to 36 Gbps. The mux latches the four differential inputs on falling edge of the input clock CKIN (See timing diagram on page.6). The device uses both rising and falling edges of the half-rate clock to serialize the data. A quarter-rate clock output, which is synchronous to the data output of HMC847LC5, is generated on chip. All clock and data inputs / outputs of the HMC847LC5 are CML and terminated on-chip with 50 Ohms to the, VCC, and may be DC or AC coupled. The inputs and outputs of the HMC847LC5 may be operated either differentially or single-ended. The HMC847LC5 also features an output level control pin, VCTRL, which allows for loss compensation or signal level optimization. The VDCC pin controls the data output cross-point & duty cycle. The HMC847LC5 operates from a single +3.3V supply and is available in ROHS compliant 5x5 mm SMT package. Electrical Specifications, T = +25C, Vcc = +3.3V A Parameter Conditions Min. Typ. Max Units Power Supply Voltage 5% Tolerance 3.13 3.3 3.47 V Power Supply Current Vctrl = 2.5V 480 530 580 mA Output Amplitude Control Voltage Range (Vctrl) 1.7 2.5 3 V Data Output Voltage Swing Range Differential, peak-to-peak 36 Gbps 550 900 mVp-p Duty Cycle Control Voltage Range (Vdcc) Vdcc = 1.6V for 50% duty cycle 1 1.6 2 V Duty Cycle Control Range 36 Gbps 40 50 60 % Clock Output Voltage Swing Differential, peak-to-peak 10 GHz 480 580 680 mVp-p Maximum Data Rate 36 Gbps Maximum Clock Rate Half Rate Clock 18 GHz Information furnished by Analog Devices is believed to be accurate and reliable. However, no For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that may result from its use. Specifications subject to change without notice. No Phone: 781-329-4700 Order online at www.analog.com 1 license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Application Support: Phone: 1-800-ANALOG-D Trademarks and registered trademarks are the property of their respective owners. MUX & DEMUX - SMTHMC847LC5 v06.1215 36 Gbps, 4:1 MUX WITH DUTY CYCLE CONTROL & PROGRAMMABLE OUTPUT VOLTAGE Electrical Specifications, (continued) Parameter Conditions Min. Typ. Max Units DC 36 Gbps 1 Data Rate Range V 3.3V, T 25 DC 40 Gbps CC A 2 Single-Ended, peak-to-peak 150 800 mVp-p Input Amplitude (Data) Differential, peak-to-peak 150 1000 mVp-p 2 Single-Ended, peak-to-peak 100 700 mVp-p Input Amplitude (Clock) Differential, peak-to-peak 100 1000 mVp-p Input High Voltage (Data & Clock) Vctrl = 2.5V 2.8 3.8 V Input Low Voltage (Data & Clock) Vctrl = 2.5V 2.3 3.3 V Output High Voltage Vctrl = 2.5V 2.94 V Output Low Voltage Vctrl = 2.5V 2.62 V Data input up to 10 GHz -10 dB Input Return Loss Clock input up to 36 GHz -12 dB Data output up to 28 GHz -10 dB Output Return Loss Clock output up to 36 GHz -5 dB 3 Deterministic Jitter, Jd 3.5 ps p-p 4 Additive Random Jitter, Jr 0.75 ps rms 3 Rise Time, tr 20% - 80% 13 ps 3 Fall Time, tf 20% - 80% 13 ps Propagation Delay Clock to Clock, Tcdp Input clock to output clock 107 ps 125+2.5 CLKIN Propagation Delay Clock to Data, Tdpd Input clock to output data ps period Falling edge of CKIN to t sample at center Set Up Time, ts -80 ps of DIN1-4 time Falling edge of CKIN to t sample at center Hold Time, th 90 ps of DIN1-4 time 1 Low frequency operation depends on AC coupling. 2 The un-used port is biased 3.3V 31 3 CKINP: 18 GHz clock signal, 300 mVp-p single-ended, D1P-D4P: 9 Gbps PRBS 2 -1 pattern, 300 mVp-p single-ended 4 Random jitter is measured with 36 Gbps PRBS31 pattern Differential Output Swing 1 2 1 2 DC Current vs. Supply Voltage vs. Supply Voltage 700 850 800 650 750 600 700 550 650 500 600 450 550 400 500 350 450 3.13 3.19 3.24 3.3 3.36 3.41 3.47 3.13 3.19 3.24 3.3 3.36 3.41 3.47 SUPPLY VOLTAGE V (V) SUPPLY VOLTAGE V (V) CC CC +25 C +85 C -40 C +25 C +85 C -40 C 1 Vctrl = 2.5V 2 Data Rate = 36 Gbps For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 Order online at www.analog.com 2 Application Support: Phone: 1-800-ANALOG-D DC CURRENT (mA) DIFFERENTIAL VOLTAGE (mV ) pp MUX & DEMUX - SMT