High Speed ADC USB FIFO Evaluation Kit HSC-ADC-EVALB-SC/HSC-ADC-EVALB-DC FEATURES FUNCTIONAL BLOCK DIAGRAM Buffer memory board for capturing digital data used with high speed ADC evaluation boards to simplify evaluation STANDARD 32 kB FIFO depth at 133 MSPS (upgradable) USB 2.0 Measures performance with ADC Analyzer Real-time FFT and time domain analysis Analyzes SNR, SINAD, SFDR, and harmonics Simple USB port interface (2.0) Supporting ADCs with serial port interfaces (SPI) SINGLE OR DUAL HSC-ADC-EVALB-SC OR HIGH-SPEED ADC HSC-ADC-EVALB-DC EVALUATION BOARD On-board regulator circuit, no power supply required 6 V, 2 A switching power supply included CHB FIFO, PS REG PS n 32K, Compatible with Windows 98 (2nd ed.), Windows 2000, 133MHz FILTERED +3.0V ANALOG REG Windows Me, and Windows XP INPUT TIMING ADC CIRCUIT USB EQUIPMENT NEEDED CTLR CHA FIFO, n Analog signal source and antialiasing filter 32K, CLOCK 133MHz CIRCUIT Low jitter clock source SPI SPI High speed ADC evaluation board and ADC data sheet CLOCK INPUT PC running Windows 98 (2nd ed.), Windows 2000, 120-PIN CONNECTOR Windows Me, or Windows XP Figure 1. Latest version of ADC Analyzer USB 2.0 port recommended (USB 1.1-compatible) PRODUCT HIGHLIGHTS 1. Easy to Set Up. Connect the included power supply and PRODUCT DESCRIPTION signal sources to the two evaluation boards. Then connect The high speed ADC FIFO evaluation kit includes the latest to the PC and evaluate the performance instantly. version of ADC Analyzer and a buffer memory board to capture 2. ADIsimADC. ADC Analyzer supports virtual ADC blocks of digital data from the Analog Devices high speed evaluation using ADI proprietary behavioral modeling analog-to-digital converter (ADC) evaluation boards. The FIFO technology. This allows rapid comparison between multiple board is connected to the PC through a USB port and is used ADCs, with or without hardware evaluation boards. For more with ADC Analyzer to quickly evaluate the performance of high information, see AN-737 at www.analog.com/ADIsimADC. speed ADCs. Users can view an FFT for a specific analog input 3. USB Port Connection to PC. PC interface is a USB 2.0 and encode rate to analyze SNR, SINAD, SFDR, and harmonic connection (1.1-compatible) to the PC. A USB cable is information. provided in the kit. The evaluation kit is easy to set up. Additional equipment needed 4. 32 kB FIFO. The FIFO stores data from the ADC for processing. includes an Analog Devices high speed ADC evaluation board, A pin-compatible FIFO family is used for easy upgrading. a signal source, and a clock source. Once the kit is connected 5. Up to 133 MSPS Encode Rate on Each Channel. Single- and powered, the evaluation is enabled instantly on the PC. channel ADCs with encode rates up to 133 MSPS can be used Two versions of the FIFO are available. The HSC-ADC-EVALB- with the FIFO board. Multichannel and demultiplexed output DC is used with multichannel ADCs and converters with demulti- ADCs can also be used with the FIFO board with clock rates plexed digital outputs. The HSC-ADC-EVALB-SC evaluation up to 266 MSPS. board is used with single-channel ADCs. See Table 1 to choose 6. Supports ADC with Serial Port Interface or SPI. Some ADCs the FIFO appropriate for your high speed ADC evaluation include a feature set that can be changed via the SPI. The FIFO board. supports these SPI-driven features through the existing USB connection to the computer without additional cabling needed. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 2006 Analog Devices, Inc. All rights reserved. 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LOGIC 05870-001HSC-ADC-EVALB-SC/HSC-ADC-EVALB-DC TABLE OF CONTENTS Features .............................................................................................. 1 Clocking with Interleaved Data................................................ 10 Equipment Needed........................................................................... 1 Connecting to the HSC-ADC-FPGA-4/-8 ............................. 10 Product Description......................................................................... 1 Connecting to the DEMUX BRD ............................................ 10 Functional Block Diagram .............................................................. 1 Upgrading FIFO Memory......................................................... 10 Product Highlights ........................................................................... 1 Jumpers ............................................................................................ 11 Revision History ............................................................................... 2 Default Settings........................................................................... 11 FIFO Evaluation Board Easy Start.................................................. 3 Evaluation Board ............................................................................ 13 Requirements ................................................................................ 3 Power Supplies............................................................................ 13 Easy Start Steps ............................................................................. 3 Connection and Setup ............................................................... 13 Virtual Evaluation Board Easy Start With ADIsimADC ............ 4 FIFO Schematics and PCB Layout............................................... 14 Requirements ................................................................................ 4 Schematics................................................................................... 14 Easy Start Steps ............................................................................. 4 PCB Layout ................................................................................. 21 FIFO 4.1 Data Capture Board Features ......................................... 5 Bill of Materials............................................................................... 23 FIFO 4.1 Supported ADC Evaluation Boards .......................... 6 Ordering Information.................................................................... 25 Theory of Operation ........................................................................ 9 Ordering Guide .......................................................................... 25 Clocking Description................................................................... 9 ESD Caution................................................................................ 25 SPI Description............................................................................. 9 REVISION HISTORY 2/06Revision 0: Initial Version Rev. 0 Page 2 of 28