LTC1152 Rail-to-Rail Input Rail-to-Rail Output Zero-Drift Op Amp FEATURES DESCRIPTIO n Input Common-Mode Range Includes Both Rails The LTC 1152 is a high performance, low power zero-drift n Output Swings Rail to Rail op amp featuring an input stage that common modes to n Output Will Drive 1k Load both power supply rails and an output stage that provides n No External Components Required rail-to-rail swing, even into heavy loads. The wide input n Input Offset Voltage: 10V Max common-mode range is achieved with a high frequency n Input Offset Drift: 100nV/C Max on-board charge pump. This technique eliminates the n Minimum CMRR: 115dB crossover distortion and limited CMRR imposed by com- TM n Supply Current: 3.0mA Max peting technologies. The LTC1152 is a C-Load of amp, n Shutdown Pin Drops Supply Current to 5A Max enabling it to drive any capacitive load. n Output Configurable to Drive Any Capacitive Load The LTC1152 shares the excellent DC performance specs n Operates from 2.7V to 14V Total Supply Voltage of LTCs other zero-drift amplifiers. Typical offset voltage is 1V and typical offset drift is 10nV/C. CMRR and PSRR PPLICATI S A are 130dB and 120dB and open-loop gain is 130dB. Input noise voltage is 2V from 0.1Hz to 10Hz. Gain-band- P-P n Rail-to-Rail Amplifiers and Buffers width product is 0.7MHz and slew rate is 0.5V/s, all with n High Resolution Data Acquisition Systems supply current of 3.0mA max over temperature. The n Supply Current Sensing in Either Rail LTC1152 also includes a shutdown feature which drops n Low Supply Voltage Transducer Amplifiers supply current to 1A and puts the output stage in a high n High Accuracy Instrumentation impedance state. n Single Negative Supply Operation The LTC1152 is available in 8-pin PDIP and 8-pin SO packages and uses the standard op amp pinout, allowing it to be a plug-in replacement for many standard op amps. , LTC and LT are registered trademarks of Linear Technology Corporation. C-Load is trademark of Linear Technology Corporation. TYPICAL APPLICATI Input and Output Waveforms Rail-to-Rail Buffer 5V 5V V OUT 2V/DIV 7 2 6 0V LTC1152 OUT 5V + 3 IN V IN 4 2V/DIV 1152 TA01 0V 1152 TA02 1 UO UO ULTC1152 ABSOLUTEXAI U RATI GS PACKAGE/ORDER I FOR ATIO + Total Supply Voltage (V to V ) ............................. 14V ORDER PART TOP VIEW + Input Voltage ............................ V + 0.3V to V 0.3V NUMBER SHDN 1 CP 8 Output Short-Circuit Duration (Pin 6) ............. Indefinite + LTC1152CN8 IN 2 7 V Operating Temperature Range LTC1152CS8 +IN 3 6 OUT LTC1152C............................................... 0C to 70C LTC1152IN8 V 4 5 COMP LTC1152I.......................................... 40C to 85C LTC1152IS8 Storage Temperature Range ................ 65C to 150C N8 PACKAGE 8-LEAD PDIP Lead Temperature (Soldering, 10 sec)................. 300C S8 PART MARKING S8 PACKAGE 8-LEAD PLASTIC SO 1152 T = 110C, = 130C/ W (N8) JMAX JA T = 110C, = 200C/ W (S8) JMAX JA 1152I Consult factory for Military grade parts. LECTR AL CHARACTERIST V = 5V, T = operating temperature range, unless otherwise specified. E IC ICS S A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V Input Offset Voltage T = 25C (Note 1) 1 10 V OS A V Average Input Offset Drift (Note 1) l 10 100 nV/C OS Long-Term Offset Drift 50 nV/Mo I Input Bias Current T = 25C (Note 2) 10 100 pA B A l 1000 pA I Input Offset Current T = 25C (Note 2) 20 200 pA OS A l 500 pA e Input Noise Voltage (Note 3) R = 100, 0.1Hz to 10Hz 2 3 V n S P-P R = 100, 0.1Hz to 1Hz 0.5 1 V S P-P i Input Noise Current f = 10Hz 0.6 fA/Hz n CMRR Common-Mode Rejection Ratio V = 0V to 5V l 115 130 dB CM PSRR Power Supply Rejection Ratio V = 3V to 12V 110 120 dB S l 105 dB A Large-Signal Voltage Gain R = 10k, V = 0.5V to 4.5V l 110 130 dB VOL L OUT V Maximum Output Voltage Swing (Note 4) R = 1k, V = Single 5V l 4.0 4.4 V OUT L S R = 1k, V = 2.5V l 2.0 2.2 V L S R = 100k, V = 2.5V 2.49 V L S SR Slew Rate R = 10k, C = 50pF, V = 2.5V 0.5 V/s L L S GBW Gain-Bandwidth Product R = 10k, C = 50pF, V = 2.5V 0.7 MHz L L S I Supply Current No Load l 2.2 3.0 mA S Shutdown = 0V l 15 A I Output Leakage Current Shutdown = 0V l 10 100 nA OSD V Charge Pump Output Voltage I = 0 7.3 V CP CP V Shutdown Pin Input Low Voltage 2.5 V IL V Shutdown Pin Input High Voltage 4 V IH I Shutdown Pin Input Current V = 0V l 1 5 A IN SHDN f Internal Charge Pump Frequency T = 25C 4.7 MHz CP A f Internal Sampling Frequency T = 25C 2.3 kHz SMPL A 2 U U W W W WU