LTC2000A 16-/14-/11-Bit 2.7Gsps DACs FEATURES DESCRIPTION n 80dBc SFDR at 50MHz f The LTC 2000A is a family of 16-/14-/11-bit 2.7Gsps OUT n >68dBc SFDR from DC to 1080MHz f current steering DACs with exceptional spectral purity. OUT n 40mA Nominal Full-Scale, 1V Output Compliant The single (1.35Gsps mode) or dual (2.7Gsps mode) port n 10mA to 60mA Adjustable Full-Scale Current Range source synchronous LVDS interface supports data rates of n Single or Dual Port DDR LVDS and DHSTL Interface up to 1.35Gbps using a 675MHz DDR data clock, which n Low Latency (7.5 Cycles for Single Port, can be either in quadrature or in phase with the data. An 11 Cycles for Dual Port) internal synchronizer automatically aligns the data with n >78dBc 2-Tone IMD from DC to 1000MHz f OUT the DAC sample clock. n 156dBc/Hz Additive Phase Noise at 1MHz Offset for Additional features such as pattern generation, LVDS 65MHz f OUT n loopout and junction temperature sensing simplify system 170-Lead (9mm 15mm) BGA Package development and testing. A serial peripheral interface (SPI) port allows configura- APPLICATIONS tion and read back of internal registers. Operating from n Broadband Communication Systems 1.86V and 3.3V supplies, the LTC2000A consumes 2.41W n DOCSIS CMTS at 2.7Gsps and 1.43W at 1.35Gsps. n Direct RF Synthesis All registered trademarks and trademarks are the property of their respective owners. Protected n by U.S. Patents, including 8330633. Radar n Instrumentation n Automatic Test Equipment BLOCK DIAGRAM TSTP/N PD CS SCK SDI SDO SV DD JUNCTION PATTERN SPI TEMPERATURE GENERATOR SFDR vs f , f = 2.7Gsps OUT DAC 100 DAP/N 15:0 DIGITAL AMPLITUDE = 0dBFS I = 40mA OUTFS I OUTP 90 50 4:1 16-BIT DAC 80 DBP/N 15:0 50 I OUTN 70 GAIN ADJUST 60 DCKIP/N CLOCK DELAY FSADJ ADJUST SYNC 50 0 400 600 800 1000 1200 REFIO 200 DCKOP/N CLK DIVIDER CLK f (MHz) OUT 2 OR 4 RECEIVER 10k 2000A TA01b REF AV DV AV DV GND CKP/N DD18 DD18 DD33 DD33 2000A BD 2000afb 1 For more information www.linear.com/LTC2000A LVDS RECEIVERS DDR DATA FLIP-FLOPS SFDR (dBc)LTC2000A TABLE OF CONTENTS Features ..................................................... 1 LVDS Data Input Ports (DAP/N, DBP/N) .................26 Applications ................................................ 1 Clock Synchronizer .................................................27 Block Diagram .............................................. 1 Minimizing Harmonic Distortion .............................29 Description.................................................. 1 Measuring LVDS Input Timing Skew .......................29 Absolute Maximum Ratings .............................. 3 Measuring Internal Junction Temperature (T ) .......32 J Pin Configuration .......................................... 3 Pattern Generator ...................................................32 Order Information .......................................... 4 SPI Register Summary ................................... 33 Electrical Characteristics ................................. 5 Applications Information ................................ 34 Timing Characteristics .................................... 8 Sample Start-Up Sequence .....................................34 Typical Performance Characteristics ................... 9 Output Configurations ...........................................35 Pin Functions .............................................. 16 Generating the DAC Sample Clock ..........................35 Block Diagram ............................................. 17 Synchronizing Multiple LTC2000As in Dual-Port Timing Diagrams ......................................... 18 Mode ......................................................................36 Operation................................................... 18 Synchronizing Multiple LTC2000As in Single-Port Introduction ............................................................ 18 Mode ......................................................................38 Dual-Port Mode ...................................................... 19 PCB Layout Considerations ....................................40 Single-Port Mode .................................................... 19 Pin Locations (LTC2000A-16) ........................... 45 Serial Peripheral Interface (SPI) .............................22 Pin Locations (LTC2000A-14) ........................... 47 Power-On Reset ......................................................22 Pin Locations (LTC2000A-11) ........................... 49 Power Down ...........................................................22 Package Description ..................................... 51 Reference Operation ...............................................22 Typical Application ....................................... 52 Setting the Full-Scale Current .................................23 Related Parts .............................................. 52 DAC Transfer Function ............................................ 24 Analog Outputs (I ) ........................................ 24 OUTP/N DAC Sample Clock (CKP/N) ....................................25 Divided Clock Output (DCKOP/N) ............................25 LVDS Data Clock Input (DCKIP/N) ..........................25 2000afb 2 For more information www.linear.com/LTC2000A